Series

Termination — the series

4 essays on one idea, from the one that introduces it to the one that assumes the rest.
  1. A series-terminated net holds half a swing for 1.0 delays at 50% along it. computed by solving, not by drawing. What a receiver 50% of the way along one net sees under three terminations, from a lattice evaluated at that point rather than at the ends. The shaded strip is the interval in which a logic input has no defined answer — between 30% and 70% of the swing. The series-terminated net sits in it for 4.83 ns, which is 2(1 − x) delays exactly and is zero only at the far end; the unterminated net sits in it for 4.83 ns and then overshoots by 82%; the parallel-terminated net never does, and draws 60 mA down the line for as long as the level is held.

    The resistor at the wrong end

    A lattice diagram is read at the two ends of a line, and that is where the two respectable terminations look identical: a clean step, one delay late, at the receiver. Anyone standing halfway along a series-terminated net sees half the swing held for a full round trip, which for a logic input is not a level at all. The interval is 2(1−x) delays exactly, it is zero only at the far end, and the scheme that never has it draws sixty milliamperes for as long as the level is held.

    part 1 · lines
  2. A stub holds the far end at two thirds for twice its own delay. computed by solving, not by drawing. A series-terminated net with a branch on it, marched as waves on a delay grid. Three lines of equal impedance meet at the junction, so each presents the others with Z₀/2 and a wave arriving is reflected by exactly −1/3 with two thirds going on. The far end therefore receives 66.7% of the swing at one line delay instead of all of it, and is held there for 0.400 line delays — twice the stub's own delay of 0.41 ns, being the round trip to its open end and back. The same net without the branch is drawn beside it and settles in one round trip, which is what a series termination is for. Each further round trip of the stub divides what is left of the error by three and turns it over, because the returning wave doubles at the open far end — so the receiver approaches its level alternately from below and from above.

    The receiver that is a branch

    A lattice diagram has two ends, and an interior receiver is not a point on a net — it is a short piece of track leading off it to a pin, open at the far end. Three lines of equal impedance meeting at a junction present each other with half the impedance, so a wave arriving is reflected by exactly minus a third and two thirds goes on: the far end receives two thirds of the swing and sits there for twice the stub's own delay, whatever the net is terminated with and wherever on it the branch is.

    part 2 · lines
  3. Terminated at both ends: no interval anywhere, at 1.65 V of 3.3. computed by solving, not by drawing. The same net as the three-way comparison, with a fourth trace: a series resistor at the driver AND a parallel one at the receiver. Both reflection coefficients are zero, so the wave that arrives at a receiver 50% of the way along is already the final value and there is no second arrival to wait for — the departure after the first edge is 0.0e+0 per cent, which is the arithmetic's floor. What it costs is the level: 1.650 V of 3.3, exactly half, because two equal resistances divide the supply and nothing reflects to double it back. The series scheme in the same place is undefined for 1.00 delays and the unterminated one overshoots by 82 per cent. The hold current is 33.0 mA against the parallel scheme's 60, because the path to ground now has two resistances in it.

    Terminated at both ends

    A series resistor at the driver and a parallel one at the receiver cost exactly half the swing — 1.650 volts of 3.300 — and no reflection ever gives it back, because there is no reflection. What the half buys is measured rather than assumed: a driver thirty per cent off its assumed impedance rings a series-terminated net by 16.3 per cent and a doubly terminated one by nothing at all, and an interior receiver on a series-terminated net sits in the undefined band for every far-end resistance above 125 ohms, which is Z₀/(1−2b) and contains no length, no driver and no frequency.

    part 3 · lines
  4. A 3.3 V edge from a 10 Ω driver down a 50 Ω line of 1 ns, received through 50 Ω in series with four capacitors, beside a plain 50 Ω and an open end. computed by solving, not by drawing: the line marched by its characteristics. The open end rings up to 5.50 V; the plain resistor holds 2.750 V, the launched level, and never reaches the swing. With the capacitor the far end arrives at the same 2.75 V and then climbs as the capacitor charges and stops terminating: with a time constant of half a round trip (20.0 pF) it overshoots to 4.48 V; with one, 3.83 V; with three (120 pF) it rises without overshoot to 3.30 V by 24 ns; with ten, 3.13 V by 24 ns, still on its way.

    The termination that runs out

    A 50 Ω resistor at the end of a line terminates every edge and draws current for as long as the line is held high: 75.6 mW on an alternating pattern from a 3.3 V, 10 Ω driver. Put a capacitor in series with it and the standing current is gone, and so, eventually, is the termination: the far end reflects nothing as an edge arrives and the whole of it once the capacitor has charged, by one less the exponential of −t/2Z₀C exactly. Under two round trips of time constant the receiver overshoots — 54.8 per cent at a quarter of one — and above it the receiver waits on the capacitor to reach the swing. On a pseudo-random pattern the levels are tightest at three round trips, and on a fast pattern the capacitor holds the line's mean and the resistor still burns half of what a plain one does.

    part 4 · lines

All series