How this site is made

The figure library

Every picture here is generated from code at build time. This page lists the generators, each rendered at its defaults.

No figure on this site is a drawing that was made once and saved. Each one is a function: it takes a circuit's parameters, solves the network, and returns SVG. The same generator draws a capacitor with a nanohenry of lead and one with twenty, and neither is redrawn by hand — which is also why every frame a reader can reach on a slider has passed the same assertions as the one printed here.

That is the reason the collection can keep growing without the illustrations drifting apart. A generator is written once, checked once, and every essay that calls it inherits the same line weights, the same colour roles, and the same behaviour in dark mode. There are 25 of them so far, and between them they carry several hundred assertions that run at build time — a figure whose circuit does not do what its caption says stops the build rather than shipping.

bode-first-order

capacitor-impedance

damping-family

diode-drop

divider-loaded

edge-map

filter-families

filter-step

filter-tradeoff

group-delay

ideal-vs-real

impedance-seen

loop-gain

lumped-vs-line

margin-and-ringing

network-solved

nyquist-locus

phasor-sum

pole-plane

refusals

resonance-bandwidth

slew-departure

small-signal-departure

source-model

step-two-routes