Circuits that do a job, and the range they do it over

The period a delay lengthens

Feed a comparator's output back through a resistor to the capacitor on its own input and the two thresholds stop defending a decision and start setting a period. The closed form is two RC times the log of one plus beta over one minus beta, and a marched circuit recovers it as the step shortens. A comparator that responds fifty nanoseconds late does not add fifty nanoseconds to each half cycle: it adds 4/(1+beta) times the delay to the period, 2.65 here against the 2 that counting it twice gives, because during the delay the capacitor keeps going the way it was going.

Assumes: Two thresholds because there is a floor · One step, computed twice

The previous essay’s two thresholds exist to stop a decision being made more than once. Wire the comparator’s output back to the capacitor on its own input through a resistor and the same two thresholds do something else: they set a period, and the circuit is an oscillator that has nothing to do with resonance, poles or a frequency-selective network.

It is also the second oscillator in this field, and the contrast with the first is worth having in advance. That one’s frequency is set by a network’s phase and its amplitude by a nonlinearity. This one’s amplitude is set by the comparator’s output levels — trivially, exactly, and with no dynamics at all — and its frequency by a charging exponential. Everything difficult about the first is easy here, and vice versa.

A comparator's delay, at a divider ratio of 0.50Each nanosecond of comparator delay adds 2.650 nanoseconds to the period — measured as a slope between two delays, both exact multiples of the marching step — against the 2.667 that 4/(1+β) gives and the 2 that counting the delay twice gives. A 50 ns comparator therefore holds the frequency to one per cent only below 75.0 kHz.050100010203040comparator delay (nanoseconds)how much longer the period is (nanoseconds)twice the delay2.650 × the delaysolved, then checked4/(1+β) = 2.667, and it is not 2
Fig. 1 How much longer the period is than the closed form, against the comparator’s delay. The straight line is what counting the delay into each half cycle would give; the measurement is above it at every delay. The slider is the divider ratio that sets the two thresholds.

The closed form

The capacitor charges towards whichever output level the comparator is at, through the resistor, and the comparator changes state when the capacitor reaches a threshold. Starting from βV-\beta V heading for +V+V, the time to reach +βV+\beta V is RCln ⁣((1+β)/(1β))RC\ln\!\big((1+\beta)/(1-\beta)\big), and the other half cycle is the same by symmetry:

T=2RCln1+β1βT = 2RC\ln\frac{1+\beta}{1-\beta}

With 10 kΩ, 100 pF and β = 0.5 that is 2197.2 nanoseconds, or 455 kHz.

There is nothing approximate in it. The exponential is exact, the thresholds are exact, and the symmetry is exact — which is unusual for a design expression in this collection and makes the comparison below clean, because any difference between the marched period and this number is attributable to something identifiable.

The march recovers it

Marching the netlist with an instantaneous comparator and no delay must return that number, and it does as the step shortens:

steps a cycle measured period excess
1000 2206.0 ns 8.79 ns
2000 2201.6 ns 4.39 ns
4000 2199.4 ns 2.20 ns
8000 2198.3 ns 1.10 ns

The excess halves every time the step halves, and it is exactly four times the step at every one of those rows. That is the discretisation and nothing else: the comparator’s flip is applied at a step boundary rather than at the interpolated instant of the crossing, so each transition is late by up to one step, and the capacitor’s overshoot during that lateness lengthens the next half cycle as well.

Which is a small preview of the essay’s whole result, arriving as a numerical artefact before it arrives as physics: a late transition costs more than its own lateness.

That the excess falls by exactly two when the step is halved rather than by four is itself informative, and one step, computed twice is where the expected rate is established: a step response walked forward in time differs from the exact one by the trapezoidal rule’s own error, which falls by a factor of four every time the step is halved. Here the error is first order in the step rather than second, because it is not the integration rule that is wrong — the rule is doing what that essay measures — but the event, which is applied at a step boundary instead of at the interpolated instant of the crossing. A marched circuit with a threshold in it therefore converges more slowly than the same circuit without one, and the distinction is visible in the exponent rather than in the size.

One step response, computed twice: from the poles, and by walking the network forward. A damping ratio of 0.22, so the overshoot is 49.2%. The two curves are drawn on top of each other; the panel below is the difference between them, which is the trapezoidal rule's error at 500 steps and reaches 1.70e-3 V.
Fig. 2 The rule doing the marching, and the check on it, from the transients field. One step response computed from the residues and again by walking the network forward, with the difference between them drawn below — the trapezoidal rule’s own error, driven down by shortening the step.

What a real comparator does

A comparator responds late. The threshold is crossed, and some tens of nanoseconds later the output moves — a delay that is a property of the part and is one of the two numbers a comparator is sold on.

The naive accounting is that each half cycle is lengthened by the delay, so the period grows by twice it. The measurement says otherwise:

delay excess over the closed form excess ÷ delay
11 ns 29.1 ns 2.65
22 ns 58.2 ns 2.65
44 ns 116.5 ns 2.65

2.65, not 2. The extra is that during the delay the capacitor does not wait: it keeps charging the way it was going, so when the flip finally happens the capacitor is past the threshold, and the next half cycle starts further out and takes longer to reach the opposite threshold.

The size of that is derivable. During a delay tdt_d the capacitor moves by V(1β)td/RCV(1-\beta)t_d/RC to first order; a half cycle that starts Δv\Delta v further out is longer by RCΔv/V(1+β)RC\,\Delta v/V(1+\beta); and adding the delay itself gives a half cycle longer by td(1+(1β)/(1+β))t_d\big(1 + (1-\beta)/(1+\beta)\big). Doubling for the two halves:

ΔTtd=41+β\frac{\Delta T}{t_d} = \frac{4}{1+\beta}

At β = 0.5 that is 2.667 against a measured 2.650 — 0.63% apart, and the shortfall is the second-order term, since these delays are one to two per cent of the period.

Five divider ratios

A relation with a parameter in it should be checked at more than one value of the parameter, and this one is checked at five:

β measured slope 4/(1+β) departure
0.1 3.633 3.636 −0.09%
0.3 3.050 3.077 −0.87%
0.5 2.650 2.667 −0.63%
0.7 2.333 2.353 −0.83%
0.9 2.100 2.105 −0.25%

Every departure is negative and under one per cent, which is the signature of a first-order expression being measured at a finite step rather than of a wrong expression. And the whole range is above two: the naive answer is optimistic at every divider ratio there is, most so at small β, where the thresholds are close together and the capacitor is moving fastest when the flip is due.

That last point is the design one. A relaxation oscillator with narrow hysteresis is a relaxation oscillator whose capacitor is travelling quickly through its thresholds, so a fixed delay costs proportionally more of the period — the two effects reinforce rather than cancel.

How the slope is measured

The measurement above needed one piece of care, and it is the only place in this field where the discretisation is visible in a claim rather than in a residual.

The comparator’s flip is applied at a step boundary, so a delay is effectively rounded to a whole number of steps. Measuring the excess at a single delay therefore carries up to half a step of error — which at 50 ns and a 0.27 ns step is half a per cent, but at 5 ns is five per cent, and the first version of this sweep returned slopes of 2.42 and 3.57 that moved with the step count rather than with β.

The repair is to take the slope between two delays that are both exact multiples of the step, so the rounding cancels exactly. The two used are forty and a hundred and sixty steps, which at these values is 11.0 and 43.9 nanoseconds — realistic delays for a fast comparator, and a range over which the second-order term is still under a per cent.

The difference equation, checked against the unit circle. computed by solving, not by drawing. The curve is the transfer function evaluated on the unit circle. The dots are the steady-state amplitude of the same filter marched forward one sample at a time — two past inputs and two past outputs per section, no transfer function anywhere — driven by a coherent sinusoid and measured over the second half of the record, after its own step response has arrived. The two routes agree to 1.71e-13 at 10 frequencies. They share the pole positions and nothing else, which is what makes the agreement worth having: a sign error in a recursion produces a stable, plausible filter that no evaluation of a formula would catch.
Fig. 3 The general reason a marched result is checked against something that never marches, from the digital field. Two routes agreeing to 2×10132\times10^{-13} and sharing only the pole positions — because a sign error, or a rounding, in a recursion produces a stable and plausible answer that no evaluation of a formula would catch.

The edge, in the units a designer has

Turn the slope into the question a datasheet has to answer. If a comparator’s delay is tdt_d and the period must be within a fraction f of the closed form, then

T>4tdf(1+β)T > \frac{4 t_d}{f(1+\beta)}

so a 50 ns comparator at β = 0.5 holds one per cent only below 75 kHz. The naive estimate — two delays per period — would have said 100 kHz, so the rule is optimistic by a third exactly where a designer would rely on it.

At a tenth of a per cent it is 7.5 kHz. At β = 0.1, where the slope is 3.64, the same comparator holds one per cent only below 55 kHz.

And a fast comparator does not remove the problem so much as move it: a five-nanosecond part holds one per cent to 750 kHz, above which the period is again being set by the part rather than by the resistor and capacitor the design chose.

A comparator's delay, at a divider ratio of 0.30. Each nanosecond of comparator delay adds 3.050 nanoseconds to the period — measured as a slope between two delays, both exact multiples of the marching step — against the 3.077 that 4/(1+β) gives and the 2 that counting the delay twice gives. A 50 ns comparator therefore holds the frequency to one per cent only below 65.0 kHz.
Fig. 4 A divider ratio of 0.30. The measured period is 3.050 time constants against the closed form’s 3.077, and the two stay within one per cent below 65.0 kHz. The edge, in the units a designer has, is that frequency: above it the comparator’s propagation delay is a large enough share of the period to move it.
A comparator's delay, at a divider ratio of 0.70. Each nanosecond of comparator delay adds 2.333 nanoseconds to the period — measured as a slope between two delays, both exact multiples of the marching step — against the 2.353 that 4/(1+β) gives and the 2 that counting the delay twice gives. A 50 ns comparator therefore holds the frequency to one per cent only below 85.0 kHz.
Fig. 5 Seven tenths: 2.333 measured, 2.353 predicted, one per cent to 85.0 kHz. A wider hysteresis shortens the charging leg and pushes that edge out, because the fixed delay is a smaller share of a shorter period.

What else moves the period

The delay is the interesting term and it is not the largest one in most circuits. For completeness, what else is in the expression:

The resistor and capacitor themselves. A 5% capacitor is 5% of period, directly. This is why a relaxation oscillator is used where a few per cent is acceptable and a crystal where it is not.

That sentence assumes the capacitor is 5% of something, and for the part most likely to be fitted here it is not. The capacitance that is not one number measures a class II ceramic at its rated voltage and finds three different capacitances depending on which question is asked — 2.000 µF as a slope, 5.814 µF as a charge average, 2.105 µF as a bridge reads it — on a part printed as ten. The quantity this circuit is sensitive to is the slope, since the period is set by how much charge moves the voltage a threshold’s worth, and the slope is the smallest of the three. A tolerance band around the printed number therefore says nothing at all about the period: the part can be inside its 5% specification and set a period two and a half times too short. The coefficient that is about one reading closes the escape route, showing that the printed temperature coefficient is a coefficient of the one capacitance a bridge reports at zero bias, that one number cannot determine the two parameters the part has, and that two parts a bridge cannot tell apart differ by 1.80 at the voltage they are used at. A relaxation oscillator built with a C0G dielectric is a few per cent circuit; the same oscillator built with a class II part is not a specified circuit at all.

And the resistor and capacitor are two parts rather than one. The tolerance that is not on any part is the arithmetic for that: the worst case of a combination is the sum of the tolerances and does not improve with the number of parts, while the measured spread of a population shrinks as one over the root of the count — 0.29 of a per cent for four one per cent parts against a worst case of one. So the period of any particular unit is better than the worst case by a factor that is not a design margin, and the number a specification has to carry is the worst case anyway.

The threshold ratio. β enters through a logarithm, so it is the forgiving one: a 1% error in the divider moves ln((1+β)/(1β))\ln((1+\beta)/(1-\beta)) by 0.9% at β = 0.5 and by 1.0% at β = 0.1.

The output levels. They cancel exactly in the closed form — the thresholds are proportional to the output and so is the charging target — so a comparator whose output swing changes with temperature has no first-order effect on the period at all. That is the one genuinely good property of this circuit and it is worth noticing, because it is not obvious and it is the reason the topology survives.

Where the thresholds come from. They are solved rather than taken from a divider expression, and two thresholds because there is a floor is where that solve is done and where the obvious expression is found to be nine per cent out — because the input drives through a resistor into a node the comparison holds at the reference, so the two resistors carry currents rather than forming a ratio.

The comparator’s output impedance. Not modelled here. It adds to R directly, so a part with fifty ohms of output impedance driving a ten-kilohm resistor is half a per cent of period.

Twenty nanoseconds of skew is 0.28% of duty, not 0.40. computed by solving, not by drawing. The duty cycle of a relaxation oscillator whose comparator takes longer to go one way than the other, marched, against the expression that lengthens each half cycle by its own delay. The two part company immediately and by a constant factor of about 1.42: during a delay the capacitor keeps charging past the threshold it already crossed, so the next half cycle starts further out and takes longer, and the two halves partly cancel. At 200 ns of skew on a 2585 ns period the duty is 52.805 per cent where the expression says 54.004. The open circles are the same quantity in closed form — the overshoot is V(1 − (1 − β)e^(−d/τ)) and the next half starts from it — which the march reproduces to parts in ten thousand.
Fig. 6 The half nobody measures: the duty cycle. The two legs of the cycle are not equal once the propagation delay is in, because the delay adds the same absolute time to a charging leg and a discharging leg that are not the same length. A frequency specification says nothing about it.
More hysteresis fixes the duty cycle and makes the volt-seconds worse. computed by solving, not by drawing. Two consequences of the same 50 ns of comparator skew, against how much hysteresis the comparator has, each normalised to its value at β = 0.1 (the second is divided by three so both fit one axis). The duty imbalance falls from 1.002 per cent to 0.435, because the period a large β buys grows faster than the coupling factor 2β/(1+β) rises. The volt-second imbalance per cycle rises from 18.4 to 46.5 nanoseconds per volt, for the same reason read the other way: a smaller fraction of a longer cycle is a larger area. Which of the two matters depends on what the square wave drives.
Fig. 7 And what else moves the period: the hysteresis itself, which is set by a resistor ratio and therefore by two tolerances. The period depends on it through 4/(1+β), so a ten per cent divider is a few per cent of frequency before anything about the comparator is considered.

The half nobody measures: the duty cycle

Everything above is about the period, which is the sum of the two half cycles. The difference between them is a separate quantity and it has a reader downstream.

In the model marched here the two halves are identical by construction: the same delay applies to both transitions, the two output levels are equal and opposite, and the thresholds are symmetric about the reference. So the duty cycle is exactly one half and the delay lengthens both halves equally.

A real part breaks all three. Its rise and fall delays differ — a datasheet quotes both and they are rarely equal — its two output levels are not symmetric about anything unless it is driven from split supplies, and its input offset moves the pair of thresholds together, which lengthens one half and shortens the other. Each of those is a first-order asymmetry in the duty cycle and none of them changes the period much: a comparator whose fall delay is fifty nanoseconds and whose rise delay is thirty adds 2.65 × 40 ns to the period and 20 ns of asymmetry between the halves.

Twenty nanoseconds out of 2.2 microseconds is 0.9% of duty-cycle error, which for a clock is uninteresting and for a transformer drive is not, because the magnetics field has already measured what an asymmetric drive does to a core.

A comparator's delay, at a divider ratio of 0.10. Each nanosecond of comparator delay adds 3.633 nanoseconds to the period — measured as a slope between two delays, both exact multiples of the marching step — against the 3.636 that 4/(1+β) gives and the 2 that counting the delay twice gives. A 50 ns comparator therefore holds the frequency to one per cent only below 55.0 kHz.
Fig. 8 A tenth: 3.633 measured against 3.636 predicted, one per cent to 55.0 kHz. This is the narrowest hysteresis drawn and the worst edge — the delay is a large share of a long charging leg’s end, where the waveform is flattest and a millivolt of offset is worth microseconds.
A comparator's delay, at a divider ratio of 0.90. Each nanosecond of comparator delay adds 2.100 nanoseconds to the period — measured as a slope between two delays, both exact multiples of the marching step — against the 2.105 that 4/(1+β) gives and the 2 that counting the delay twice gives. A 50 ns comparator therefore holds the frequency to one per cent only below 95.0 kHz.
Fig. 9 Nine tenths, the end of the slider: 2.100 against 2.105, one per cent to 95.0 kHz. Across the five ratios the measured period runs 3.633, 3.050, 2.650, 2.333 and 2.100 time constants and the one per cent edge runs 55.0, 65.0, 75.0, 85.0 and 95.0 kHz — the second of those is linear in the ratio, which no expression on this page predicts and the march reports directly.

So the interesting asymmetry in this circuit is not in its period at all, and the measurement that would catch it is one this essay does not make: two delays instead of one, marched separately, with the difference between the half cycles reported rather than their sum. It is the clearest thing left open here, and the machinery for it is already in place — the delay is applied by a closure that sees which transition is pending, so giving it two numbers instead of one is a change of a line.

The delay that is two delays makes that change, and three of its results are worth having here because they contradict the estimate above rather than confirming it. The duty cycle moves by 0.28 per cent for twenty nanoseconds of skew, not the 0.40 the obvious expression gives — so the same overshoot that lengthens the period also partly compensates the asymmetry, and the naive arithmetic is pessimistic here having been optimistic there. More hysteresis improves the duty cycle and worsens the volt-seconds at the same time, which means the resistor ratio that this ladder’s rung below chose for noise immunity cannot be chosen for the transformer as well. And ten nanoseconds of skew saturates a hundred-turn core in 231 cycles, which is the number that decides whether any of it matters.

That last one lands on a boundary measured in another field entirely. The flux that walks is why a small asymmetry is not a small error: a drive whose two half-cycles differ by one per cent in volt-seconds adds the same area to the flux every cycle and reaches saturation after 64 of them, and halving the drive gives 128 rather than removing the problem — there is no amplitude at which the design is inside a limit. A boundary in volt-seconds supplies the limit being walked towards, and it is the one quantity in this chain with no frequency in it: N·Ae·Bsat, 3.500 mWb-turn for the core measured there. A comparator’s two propagation delays, quoted in nanoseconds on a data sheet page about switching speed, are an input to that arithmetic.

Two oscillators, side by side

The field now has both classical kinds and it is worth putting the comparison down.

Wien bridge relaxation
frequency set by a network’s zero-phase point a charging exponential
amplitude set by a nonlinearity, measured the output levels, exactly
condition to oscillate loop gain exactly 1 loop gain above 1
what the waveform is nearly a sinusoid a triangle and a square
what a delay costs a phase shift, 4.45/ρ of frequency 4/(1+β) times itself

The row that matters is the third. One of these circuits is specified by an equality and needs a mechanism to hold it; the other is specified by an inequality with three orders of margin. That is why a relaxation oscillator can be built out of anything and a Wien bridge cannot, and why this one’s errors are all in its period while that one’s are all in its amplitude.

The gate

The period grows by 4/(1+β) times the delay, at five divider ratios, to better than one per cent.

And that is more than the naive two at every ratio, which is the essay’s claim rather than the agreement.

The excess falls as the thresholds move apart, monotonically — because a wider swing spends less of itself on the overshoot.

With no delay the marched period converges on the closed form as the step shortens, the excess halving with each halving of the step, so the 4/(1+β) is measured against a number the march agrees with rather than against a formula it was compared to.

The last of those is the one that makes the rest usable. A marched measurement compared against a closed form is only as good as the agreement in the case where the closed form is exactly right, and here that case exists and is checkable: remove the delay and the two must coincide. They do, at a rate the step size predicts. Everything measured with the delay put back is then a difference between two numbers of known provenance rather than a number with an unknown offset in it.

That structure is worth naming because it is available more often than it is used. A model with a parameter that can be set to zero, and a closed form that is exact at zero, gives a free calibration of the whole apparatus at one point — and any measurement made away from that point is then a difference rather than an absolute. What it does not give is a check on the shape away from zero, which is why the slope is measured at five divider ratios rather than one and compared against an expression containing β.

Part 2 on hysteresis

One argument about Hysteresis, and one of 5 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:

What links here

Essays that reach for this one mid-argument — the half of a link its own author cannot write down.

The objects named here

The third axis, after the field and the idea: the things themselves, and every essay that touches each one.

Charging exponentialCompanion modelHysteresisNumerical errorPropagation delayRelaxation oscillator