The delay that is two delays
Assumes: Two thresholds because there is a floor · A boundary in volt-seconds · The band a turns ratio holds over
The period a delay lengthens found that a comparator’s propagation delay does not add twice itself to a relaxation oscillator’s period. It adds 4/(1+β) times itself — 2.65 nanoseconds per nanosecond at a divider ratio of a half — because during the delay the capacitor keeps charging past the threshold it has already crossed, so the next half cycle starts further out and takes longer than the delay alone.
That essay’s own list of what it did not do carries this:
The duty cycle of the relaxation oscillator. One delay is modelled, applied to both transitions, so the two half cycles are equal by construction. A real comparator’s rise and fall delays differ, which is a volt-second imbalance of the kind the magnetics field measured — and the machinery for it is a change of one line.
This is the line. It is one line, it produces three results, and the third of them is in a different field.
Two delays, because a comparator has two
A comparator’s output stage is not symmetric. The transistor that pulls the output up and the one that pulls it down are different devices driven from different places, and a data sheet says so: the low-to-high and high-to-low propagation delays are two separate rows, and on ordinary parts they differ by tens of per cent. Nothing in the oscillator’s arithmetic knows that they are the same number, and nothing in the oscillator makes them one.
Call the difference the skew. A hundred and fifty nanosecond comparator with a fifty nanosecond skew delays one transition by 175 ns and the other by 125.
The obvious expression, and how wrong it is
Each half cycle is lengthened by the delay that ends it, so the high time is T/2 + d_up, the low time
is T/2 + d_down, and the duty cycle is their ratio. That is the expression anybody would write, and
for a skew of twenty nanoseconds on a 2.5 microsecond period it gives 50.40 per cent.
The measurement is 50.28 per cent. The expression over-states the imbalance by a factor of 1.43, and it does so by a factor that barely moves across a factor of ten in skew — 0.700, 0.700, 0.700 — so it is not a large-signal correction to a small-signal result. It is a term that was left out.
The term is the same one the rung below found and is the other half of it. During the delay that ends the high half, the capacitor overshoots its threshold; the low half then starts further out and takes longer. So the longer delay lengthens the other half cycle as well as its own, and the two partly cancel.
Writing it out exactly is one line of algebra rather than a model. The capacitor at the instant the drive finally reverses is at
and the next half cycle starts from there. Both half cycles in closed form, marched beside them, and they agree to parts in ten thousand across the whole sweep.
One constant, two results, opposite signs
Differentiate that closed form at zero delay and the coupling comes out as a single number:
So the period gains 2·(1 + (1−β)/(1+β)) = 4/(1+β) per unit of symmetric delay, which is the rung below’s result, and the difference between the half cycles gains
per unit of skew, which is this one. At β = 0.5 those are 2.667 and 0.667, measured 2.650 and 0.700 — the residual in the second being the finite base delay, since the coupling factor is derived at zero delay and measured at a hundred and fifty nanoseconds of it.
The same (1 + β) in both denominators, and the two go in opposite directions. More hysteresis makes the period-stretch smaller and the duty-imbalance factor larger.
Which means the design trade has two answers
Raising β from 0.1 to 0.85 takes the duty imbalance from 1.002 per cent to 0.435 — better by a factor of 2.3. It takes the volt-second imbalance from 18.4 to 46.5 nanoseconds per volt per cycle — worse by a factor of 2.5.
Both come from the same fact and it is worth stating plainly: a larger β makes the period longer. A fixed skew is a smaller fraction of a longer period, so the duty cycle is better; and it is a larger area, because the area is the fraction times the period and the period grew faster.
Which of the two is the quantity depends entirely on what the square wave is for. Two thresholds because there is a floor sets β against noise: enough hysteresis to stop the comparator chattering on its own floor. If the output is a clock, the duty cycle is what matters and more hysteresis is free improvement. If the output drives a transformer, it is not.
The volt-seconds, which no transformer gives back
A transformer integrates the voltage across its primary. A square wave whose two halves have equal area produces a flux that returns to where it started every cycle; one whose halves differ by an area leaves that area behind, every cycle, and nothing removes it. The flux that walks is the essay about what happens next, and its input is a fractional imbalance.
Here the fractional imbalance is not assumed. It is twice the departure of the duty cycle from a half, and it comes from a comparator’s data sheet.
Ten nanoseconds of skew is a 0.276 per cent imbalance, which at 386 kHz walks a hundred-turn core into saturation in 231 cycles — 598 microseconds. Two hundred nanoseconds does it in twelve cycles. The closed form the magnetics field derived — the flux headroom divided by the area each cycle adds — predicts every one of them to better than six per cent, and the residual is the last partial cycle.
This is what makes the result worth having rather than a curiosity about clock symmetry. A duty cycle of 50.28 per cent is a specification nobody would fail. It is also, on a core with no gap and no balancing capacitor, a fault that takes six hundred microseconds to arrive.
A boundary in volt-seconds states the limit for a drive that balances. The point of this essay is that the drive does not, for a reason that is on the comparator’s data sheet and not on the transformer’s.
The even harmonics that were not there before
A square wave with equal halves has odd symmetry — the second half is the first half inverted — and odd symmetry forbids even harmonics exactly. A duty cycle that is not a half breaks the symmetry, and the even harmonics arrive in proportion to the departure.
For a duty D the n-th harmonic goes as |sin(nπD)|/n, so the second harmonic is |sin(2πD)|/2, which is zero at D = ½ and rises linearly away from it. Measured on the marched waveform at the 50.28 per cent above it is 40.7 decibels below the fundamental, against the 41.1 the expression gives — from twenty nanoseconds of difference between two rows on a data sheet. At zero skew the same measurement returns −330 dB, which is the check that what is being measured is the asymmetry.
The same relationship appears from the other side in what a pair cancels, and what it only halves: a differential pair kills even harmonics because it is symmetric, and a mismatch between its halves lets them back in first order. Symmetry is what suppresses even orders, in a device or in a waveform, and a mismatch of any kind is what restores them.
What one line bought, and what it did not
The change was delay becoming delayUp and delayDown, with both defaulting to the old single
number so that every figure below this rung is untouched. Ten lines including the closed form, and
the duty cycle measured on the output’s transitions rather than on the capacitor’s crossings —
which matters, because those two differ by exactly the delay, so measuring the wrong one returns
fifty per cent whatever the comparator does.
The measurement of the duty cycle deserves the same care as the model. It is taken between the output’s own transitions and not between the capacitor’s threshold crossings, because those two sequences differ by exactly the delay — which is the quantity in question — so a duty cycle measured on the capacitor comes out at fifty per cent whatever the comparator does. That is a whole essay’s finding measured away by choosing the wrong node, and it is the first thing this rung had to get right.
One fault was found in the writing and is worth recording because it is the kind that passes. The first version decided which interval was the high one from the parity of the array of transitions, which depends on how many transitions the run happened to contain: the duty cycle came out above a half for some values of β and below it for others, with the closed form saying above for all of them. A quantity that alternates in sign with a parameter it cannot depend on is a bug and not a finding, and the only reason it was caught is that the closed form existed to disagree with it.
How much of it there actually is, and how it is specified
The skews used above are not invented. A general-purpose comparator’s data sheet gives its two propagation delays as separate rows with separate limits, and the difference between the two typical figures is commonly ten to twenty per cent of either. A part specified at 150 ns typical with a 20 ns difference is exactly the case drawn here.
What a data sheet does not give is the skew’s own tolerance, and that is the number this argument needs. The two delays are each specified with a maximum, and a reader who subtracts one maximum from the other gets a bound that is far too wide, because the two are correlated: they move together with supply voltage, with overdrive and with temperature. The honest statement is that the skew is a difference of two quantities specified separately and correlated unknown-ly, which is precisely the situation the tolerance that is not on any part is about — a quantity whose specification exists for its two halves and not for itself.
The overdrive dependence is worth one sentence because it couples back into this oscillator. A comparator’s delay falls as the overdrive rises, and in a relaxation oscillator the overdrive at the threshold is the capacitor’s own slope, which is not the same on the two transitions unless the charging and discharging resistances are equal. So even a comparator with no intrinsic skew acquires one from the circuit it is in, and the mechanism is the same one the gain that is exactly one uses to set an oscillator’s amplitude: the loop’s own state decides the parameter that decides the loop.
What is not in this model
No asymmetric slew rate. The comparator’s output is a step here, delayed. A real one has a rise time and a fall time that differ as well, which adds an area of its own — of order the transition time times the amplitude — that is a second imbalance with a different dependence on frequency.
No temperature. Both delays move with temperature and they do not move together, so the skew is itself a function of temperature and the walk that takes six hundred microseconds at 25 °C is a different number when the part is warm. That is the same gap the inductance the current decides names for the core’s own saturation flux density, on the other side of the same interface.
And no balancing. The standard cures are a series capacitor, which forbids a direct component outright, and current-mode control, which measures the magnetising current and corrects it. Neither is modelled; what is modelled is what happens with neither. The band a turns ratio holds over is where the transformer’s own limits are, and the walk above reaches the lowest of them from a direction the transformer has no way to see.
What a measurement of this looks like
The duty cycle is easy to measure and the volt-second imbalance is not, and the gap between those two statements is where this failure lives.
A counter with a duty-cycle function reads 50.28 per cent in a second and is accurate to a few parts in ten thousand, so the electrical half of the argument is a bench measurement. What it cannot see is whether the number matters, because that depends on the transformer and on the core’s remaining headroom, neither of which is on the oscillator’s schematic.
The magnetic half is measured by putting a current probe in the primary and looking at the magnetising current rather than at the voltage. A balanced drive gives a triangle centred on zero; an imbalanced one gives the same triangle walking upward, and the walk is over in a few hundred microseconds, so a slow acquisition sees only the end state — a current spike once per cycle, which looks like a shorted turn or a fast diode and is neither.
That timescale is the reason the fault is diagnosed wrongly. Six hundred microseconds is long against a switching period and short against anything a person watches, so the transformer appears to saturate immediately on start-up, which points at the design rather than at a twenty-nanosecond asymmetry. The first cycle, which no steady state contains is the essay about the other transient of the same kind, and its lesson applies here in reverse: that one is a genuine start-up effect that a steady-state analysis cannot see, and this one is a steady-state effect that looks like a start-up one.
The habit this belongs to
A model with one delay in it where the object has two is not an approximation with a small error. It is a model with a symmetry the object does not have, and a symmetry that is imposed rather than measured suppresses a whole class of result: the duty cycle was exactly a half, the even harmonics were exactly zero, and the flux came back exactly to where it started, all by construction.
The distinction matters because the collection has the opposite case as well, and the two look identical in a table. What the limiter charges for reports every even harmonic of an oscillator’s output at the arithmetic’s floor, and there the zero is real: two diodes facing opposite ways make a genuinely odd characteristic, and breaking the symmetry — one diode instead of two — fills the lines in immediately, which is what makes the claim a test. Here the zeroes were the model’s rather than the circuit’s, and no experiment performed on the model could have distinguished them. The only thing that could was asking what the object has that the model does not.
The period a delay lengthens knew this and said so, in one paragraph, with an estimate of what the fix would cost — two delays instead of one, marched separately, with the difference between the half cycles reported rather than their sum, which it described as a change of a line because the delay is applied by a closure that already sees which transition is pending. The estimate was right. What it could not know was that the fix would produce a number in the magnetics field, which is the argument for writing the paragraph down rather than remembering it.
It is worth being precise about which of that rung’s results survive the change and which do not, because the answer is nearly all of them. The period is the sum of the two half cycles, and the sum is unmoved by a skew to first order — so times the mean delay remains the right expression for the period, at every divider ratio, and the frequency edges computed from it stand. What was wrong was not a number but an absence: a quantity that had been reported as exactly zero because the model could not represent it. Those are the ones worth going back for, and they are hard to notice precisely because a zero looks like a result.
Part 3 on hysteresis
One argument about Hysteresis, and one of 5 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:
What links here
Essays that reach for this one mid-argument — the half of a link its own author cannot write down.
The objects named here
The third axis, after the field and the idea: the things themselves, and every essay that touches each one.
Duty cycleFlux densityHysteresisLimit cycleMarchingPropagation delaySaturationVolt-seconds
- The duty cycle that costs nothing duty cycle, flux density, volt-seconds
- The boundary that is a starting point marching, saturation
- The core the solver has to remember marching, saturation
- The pulse the heatsink does not feel duty cycle, marching