The floor, which bounds from below

The amplifier inside the sample

kT/C is exactly independent of the clock, of the capacitor ratio and of the switch resistance — two essays measured that and found it identically true rather than nearly so. The amplifier in the same loop behaves in the opposite way in every respect: its noise is white, it is sampled, and the number of times it folds into the band is exactly the number of time constants the settling needs. So the switches set the floor below sixty megahertz and the amplifier sets it above, and asking for two more bits of settling costs fifteen per cent more noise before anything else has changed.

17 min read 8 figures Two routes to a number The constants decide Every model has an edge

Assumes: The floor a resistor sets · The bandwidth noise sees · The frequency a sample rate invents

Two essays in this field have measured the noise a switched capacitor keeps, and both ended in the same surprising place: the answer is $kT/C$ and there is nothing else in it. Not the resistance of the switch, which moves by four orders across the measurements and cancels exactly. Not the ratio of the two capacitors, which changes how the variance is divided between two events without changing their sum. Not the clock, which sets the equivalent resistance and appears nowhere in the answer.

That result is complete for the switches and silent about the other thing in the loop. Between the sampling capacitor and the holding capacitor there is an amplifier, and its noise behaves in the opposite way in every respect that matters: it is broadband where $kT/C$ is a total, it is sampled, and it depends on the clock.

This essay puts it in and finds where the floor changes hands.

Fig. 1 The two contributions against clock frequency. √(kT/C) does not move at all; the amplifier’s rises in proportion to the clock, because a faster clock demands a faster settling and a faster settling is a wider band. The circles are a marched route that shares none of the arithmetic.

The settling requirement is the noise bandwidth

The whole result is three lines of algebra and the third one is the interesting one, so it is worth setting out slowly.

A switched-capacitor stage has to settle to some accuracy in the half clock period it is given. Call that accuracy $b$ bits; settling to one part in $2^b$ through a single time constant takes $m = \ln 2^b$ of them, so the closed loop’s time constant must be $\tau = 1/(2 m f_\mathrm{clk})$ .

A one-pole loop with that time constant passes white noise with an equivalent noise bandwidth of $1/4\tau$ — the $\pi/2$ factor this field measured on its own, arriving in a circuit designed for a settling time rather than for a filter. Substituting,

\mathrm{ENBW} = \frac{m\,f_\mathrm{clk}}{2}

and the samples land in a band half a clock wide, so the number of times the noise folds down into it is

\text{folds} = \frac{\mathrm{ENBW}}{f_\mathrm{clk}/2} = m

The number of folds is the number of time constants, exactly, with no other quantity in it. Not approximately, not to first order in something: the clock cancels, the capacitor never entered, and what is left is the settling requirement itself.

For twelve bits that is 8.318 folds. For sixteen it is 11.09. Each extra bit of settling accuracy is $\ln 2 = 0.693$ more folds, exactly, which is the cleanest possible statement of what accuracy costs at the floor.

Fig. 2 The same result read along the axis a designer moves on. Every bit of settling asked for is ln 2 more folds and therefore more noise, and the noise rises as the square root of the fold count because a fold adds variance rather than amplitude.

Fig. 3 A quarter of a picofarad. √(kT/C) rises to 126.55 µV — twice the one-picofarad figure, because the floor goes as one over the square root of the capacitance — and the frequency at which the amplifier’s own noise takes over moves out to 241 MHz. Making the hold capacitor smaller raises the floor and postpones the hand-over, which are the same fact seen from two sides.

What the two floors are, in volts

With the arithmetic settled, the numbers. A one-picofarad holding capacitor at room temperature carries $\sqrt{kT/C} = 63.28$ microvolts of noise, and nothing on the clock axis moves it.

The amplifier’s contribution at the same capacitor, for a four-nanovolt-per-root-hertz part settling to twelve bits, is 2.58 microvolts at a hundred kilohertz, 8.16 at a megahertz, 25.8 at ten and 81.6 at a hundred. It crosses $\sqrt{kT/C}$ at 60.2 megahertz.

Below that crossing the stage is switch-limited: the amplifier is a minor term, and the only lever that lowers the floor is a bigger capacitor. Above it the stage is amplifier-limited, and a bigger capacitor does nothing at all — worse than nothing, since a bigger capacitor needs a bigger switch and a bigger amplifier to charge it in the same half period.

The crossing moves the way the algebra says: it is $2kT/(e_n^2 m C_h)$ , so it falls in proportion to the capacitor and to the square of the amplifier’s density. At a hundred picofarads it is 602 kilohertz, and almost every audio-rate switched-capacitor filter is on the amplifier side of it — which is why the capacitors in such a design are sized by settling and area rather than by noise, and why the equivalent statement in a high-speed sampler is the other way round.

Five resistances, five corner frequencies, and one total on the capacitor. computed by solving, not by drawing. The noise density at a 1 pF capacitor charged through 100 Ω, 1 kΩ, 10 kΩ, 100 kΩ and 1 MΩ, at 290 K. The densities are 100 times apart and the noise bandwidths 1.0e+4 times apart, in opposite directions, so the area under every curve is the same: 63.2762 µV against 63.2762 µV, and √(kT/C) is 63.2762 µV. The resistance has cancelled out of the answer, and the reason is that ½C⟨v²⟩ is the ½kT a degree of freedom in contact with a bath holds — which no arrangement of resistors can change. The claim is about the whole frequency axis and nothing less: inside a 15.9 MHz band the same five networks give 5.05 µV to 63.07 µV, a factor of 12.5. — Fig. 4 The result this essay is standing on: five resistances, five corner frequencies, and one total — the resistance cancels because ½C⟨v²⟩ is the ½kT a degree of freedom in contact with a bath holds.

Fig. 5 And the same total on a circuit whose resistance is a clock, where the equivalent resistance moves by four orders and the noise does not move at all.

The march, and the discretisation it has of its own

The closed form above is an integral of a Lorentzian, which is the kind of thing that is right until it is not. So it is measured a second way that shares none of its arithmetic.

A seeded white sequence is generated at sixty-four times the clock, put through the settling exponential written as a difference equation, and sampled once per clock. The variance of what comes out is the answer. Nothing in that route knows about $\pi/2$ , about folding, or about the number of time constants: it is a filter and a decimation.

The two agree to 0.5 per cent of variance, against a spread of 0.7 per cent on an estimate made from forty thousand samples. That agreement holds at every clock on the axis, because both routes scale the same way.

The march has its own edge and it is worth reporting rather than hiding, because it is the discretisation error of exactly the operation the essay is about. At sixty-four times oversampling the ratio is 1.005; at thirty-two it is 0.994; at eight it is 0.755, a quarter low. The reason is that a march at eight times the clock contains no noise above four times the clock, and the continuous answer’s folding integral collects contributions from every decade above it. So the march under-reports until its own band is wide enough — which is the same statement as “the folding is real”, made from the other side.

One detail of the difference equation is worth naming because the first version got it wrong by a factor that grew with the oversampling. The exponential must be written with a direct-current gain of one, $y_k = a y_{k-1} + (1-a) x_k$ ; scaling the driving term by $\sqrt{1-a^2}$ instead — the form that gives a stationary variance equal to the input’s — makes the answer depend on the step rather than on the time constant, and it comes out proportional to the oversampling ratio.

Fig. 6 Ten picofarads. The sampled floor falls to 20.01 µV and the hand-over comes in to 6.02 MHz. Across the three capacitances drawn — 0.25, 1 and 10 pF — the floor runs 126.55, 63.28 and 20.01 µV, which is one over the square root to three figures, and the crossover runs 241, 60.2 and 6.02 MHz, which is one over the capacitance exactly.

Why the folding is total, and what that costs

It is worth being clear about what “sampled” does to a noise density, because the intuition that a sampler behaves like a filter is wrong in a way that changes the answer by a large factor.

A continuous filter of bandwidth $B$ followed by a measurement in a band $W < B$ passes only the noise in $W$ . A sampler passes all of it. Every component of the amplifier’s noise above half the clock is translated down by a multiple of the clock and lands somewhere in the band from zero to half a clock; none of it is removed, because sampling is a multiplication in time and multiplication in time is convolution in frequency, and the convolving comb has no losses in it.

So the fold count is not a fudge factor, it is a count of the copies. Eight point three of them, each carrying $f_\mathrm{clk}/2$ of the amplifier’s white density, stacked on top of each other in the only band the sampled signal has.

The consequence a designer meets is that an anti-alias filter cannot help here. The noise being folded is generated inside the loop, after any filter that could precede the stage, and the only thing that limits its band is the loop’s own settling bandwidth — which cannot be narrowed without breaking the settling requirement that set it. That is the whole of why the trade in this essay is a trade and not an engineering problem with a solution.

The one arrangement that does help is correlated double sampling, which measures the same noise twice and subtracts. It removes the part of the noise that is slow compared with the sampling interval, which is most of the flicker and none of the white, and its price is two samples per output and a $\sqrt{2}$ on the white term it does not remove. It is named here and measured nowhere.

Fig. 7 Two picofarads: 44.74 µV and 30.1 MHz. The point of the fourth setting is that neither number is a design choice on its own — a designer picks the capacitor for the floor and inherits the crossover, or picks it for the crossover and inherits the floor, and the two requirements point in opposite directions.

Two more bits costs fifteen per cent

Turned into the currency a designer works in, the fold result says something short.

The amplifier’s noise variance is proportional to $m$ , so its amplitude is proportional to $\sqrt{m}$ and therefore to $\sqrt{b}$ : the noise rises as the square root of the number of bits the settling is specified to. From eight bits to sixteen — a factor of 256 in settling accuracy — the noise rises from 6.66 microvolts to 9.42, a factor of exactly $\sqrt{2}$ .

Two bits, at the twelve-bit end, is a factor of 1.15. That is not a large number, and it is worth having precisely because it is not: the intuition that asking for much more settling accuracy costs much more noise is wrong, and the correct answer — a square root of a logarithm — is very forgiving. The expensive axis is the clock, where the noise rises as $\sqrt{f_\mathrm{clk}}$ with no logarithm to soften it.

The other thing this makes calculable is the settling specification itself. Since the folds are the time constants, a stage specified to settle to twelve bits and then given a fifty per cent margin — thirteen time constants rather than 8.3 — has 25 per cent more noise power for the margin alone. Design margin at the settling requirement is not free at the floor, and it is the one place in this collection where a safety factor has a measurable price in a different quantity.

Fig. 8 And the other parameter: a one-nanovolt amplifier rather than a four-nanovolt one, on the same picofarad. The sampled floor is unmoved at 63.28 µV, because kT/C has no amplifier in it, and the hand-over moves from 60.2 MHz out to 963 MHz — a factor of sixteen for a factor of four in noise density, which is the square in the folding. A quieter amplifier does not lower this floor; it moves the clock frequency at which the floor stops being the answer.

What this does not contain

Three things are named here and measured nowhere, and each would move the answer in a stated direction.

The amplifier’s current noise flows in the switched capacitors and is converted to a voltage by whatever impedance they present at the sampling instant, which is not a resistance and not constant. It adds a term that grows with the capacitor rather than falling with it, so it puts a lower bound on the useful capacitor size that this model does not have.

The amplifier’s flicker corner puts a rising density below a few tens of hertz. Sampled, that contribution folds in the same way, but it is correlated between adjacent samples in a way white noise is not — which is exactly what the essay on averaging in this field measured, and it means the noise of a long integration is not the noise of one sample divided by the root of the count.

And the switch charge injection is a signal-dependent offset rather than noise at all. It is what a differential arrangement is for, and it belongs with the offset measurements in the semiconductor field.

What this essay does contain is the term that a designer trades against settling, computed from the settling requirement itself, and the frequency at which it takes over from the result the two rungs below established.

The three quantities that pull on one capacitor

A switched-capacitor stage’s holding capacitor is chosen against three requirements, and this essay adds the third of them, so it is worth writing the set out.

Noise wants it large: $kT/C$ falls as $1/\sqrt{C}$ , and below the crossing it is the whole floor.

Speed wants it small: the same amplifier must charge it to the settling accuracy in half a clock period, and the current needed rises in proportion to the capacitance, so a design that doubles the capacitor to gain 3 decibels of signal-to-noise must double the amplifier’s transconductance and its current to keep the settling.

Area wants it small, and area is not in any of the physics here. A hundred picofarads of good capacitor is a large fraction of a small chip, and the cost of doubling it is the cost of the whole stage.

The result in this essay is what makes the first of those three finite. Above the crossing clock the noise requirement stops pulling: the floor is the amplifier’s, it does not fall as the capacitor grows, and every picofarad added past that point buys nothing and costs current and area. That is a real design boundary, it is computable from three numbers a data sheet gives — the amplifier’s density, the settling accuracy demanded and the clock — and it is the kind of number this collection exists to put in front of somebody before the layout rather than after it.

At a hundred megahertz and four nanovolts per root hertz, settling to twelve bits, that capacitor is 0.60 picofarads: past it, a larger holding capacitor is spent money.

The same three requirements are what make the low-frequency case look so different. At a hundred kilohertz the crossing capacitor is six hundred picofarads, which is larger than anybody would build, so the noise requirement pulls all the way and the design is switch-limited whatever is done to it — which is the regime the two essays below this one measured, and the reason their result was allowed to be about the switches alone. The crossing is what separates the two regimes, and until it was computed there was no way to know which of them a given design was in.

The three floors a sampler has

A sampled stage has three floors and they hand over at computable frequencies. The noise a clock does not make is kT/C, which does not contain the clock at all. This page is the amplifier’s own, which folds entirely into the band and therefore does. The sample that is subtracted is the arrangement that removes one of them and leaves the others. The bandwidth noise sees is the π/2 that turns a density into a voltage in the first place, and The floor a resistor sets is where the two-route discipline behind every number here is established. A floor and a ceiling is what the three of them are worth once a ceiling is put above them.

What is checked

The fold count is asserted equal to the number of time constants to the last bit, which is the essay’s central claim and is an identity rather than a measurement. The marched variance is asserted against the closed form to within six standard errors of the estimate, at every clock. $kT/C$ is asserted not to move across five decades of clock, which is what makes the crossing a crossing. The crossing itself is asserted to lie inside the range drawn, so that it is a number the figure contains rather than an extrapolation. And the per-bit cost is asserted to be exactly $\ln 2$ folds, with the noise rising as the square root of the fold count rather than in proportion to it.

The one thing asserted about the march’s own error is the direction: the ratio at eight times oversampling must be below the ratio at sixty-four, because a march that cannot see the noise above its own half rate cannot fold it.

Two floors that behave in opposite ways

The result on this page is worth stating beside the two it inverts, because between them they say what a sampled circuit’s noise budget is actually made of.

The total that has no resistor in it and the noise a clock does not make establish the switches’ contribution and its remarkable independence: $kT/C$ with the holding capacitor in it and nothing else, exactly rather than asymptotically, at every capacitor ratio and every clock rate. Nothing a designer changes about the switching moves it.

The amplifier behaves in the opposite way in every one of those respects, which is the point of this essay: its noise is white rather than sampled to begin with, the folding is what makes it a sampled quantity, and the number of folds is set by the settling requirement rather than by any noise consideration at all. So the one quantity that is fixed and the one quantity that is bought are in the same loop, and which of them dominates is decided by a clock rate — the switches below sixty megahertz and the amplifier above.

The consequence for a design is the awkward one and is worth naming. Every other way of buying accuracy in a sampled system asks for more settling time constants, and a resistor made of a clock shows the same requirement appearing as one of that technique’s three conditions. Here more settling is more noise, at fifteen per cent for two bits, which makes accuracy and resolution requirements that usually reinforce each other pull apart.

The fifteen per cent is worth converting into the unit the requirement is written in. Fifteen per cent more noise voltage is 1.2 decibels of signal-to-noise ratio, which by six decibels a bit’s arithmetic is a fifth of a bit — so buying two bits of settling accuracy costs a fifth of a bit of resolution. That is a good trade and it is a trade, which is the part a settling specification written in time constants does not say. And it is a trade that gets worse rather than better as the resolution rises, since the settling requirement grows with the bit count while the fifth of a bit is charged per two bits — so the arrangement that is comfortable at twelve bits is the one that has to be argued about at eighteen.