A resistor made of a clock

The essay about impedance scaling ended with a practical remark and did not follow it up. A design is exactly invariant under multiplying every resistance and dividing every capacitance by the same factor, so a designer has a free parameter; what decides it is the things that do not scale; and on an integrated circuit the thing that does not scale is area. On-chip capacitors are picofarads, so an audio-frequency filter wants resistors of megohms, and a megohm of polysilicon is a strip long enough to be a problem and imprecise enough to be a worse one.

The way out is not a better resistor. It is to stop using one.

A capacitor connected alternately to two nodes carries $C\Delta V$ of charge from one to the other every time it is switched. Switch it $f_{\text{clk}}$ times a second and the average current is $f_{\text{clk}}C\Delta V$, which is Ohm’s law with

$$R_{\text{eq}} = \frac{1}{f_{\text{clk}}C}$$

One picofarad at a megahertz is a megohm. One picofarad at ten kilohertz is a hundred megohms. A tenth of a picofarad at ten kilohertz is a gigohm, in a square of silicon a couple of microns on a side, and adjustable afterwards by changing a number in a clock divider.

That is the whole idea, and it is not a resistor. What follows is the three separate ways it is not, because they bind on three different quantities and only one of them is the one everybody quotes.

The circuit obeys a difference equation, exactly #

The first thing to notice is that the sampled circuit’s behaviour is not an approximation of anything. It is exact, and it is a difference equation.

Every clock period the switched capacitor takes a sample of the input and then shares its charge with the holding capacitor. Charge is conserved in the sharing, so

$$v[n+1] = v[n] + \frac{C_s}{C_s + C_h}\left(v_{\text{in}} - v[n]\right)$$

which is a single pole at $z = C_h/(C_s + C_h)$. With a ratio of 0.02 the pole sits at 0.980392 and the circuit’s memory is 51 clock periods.

The continuous model replaces the switch and $C_s$ with the equivalent resistance and gives a corner at $f_{\text{clk}}C_s/2\pi C_h$. The exact circuit’s half-power frequency is the $z$-plane answer, and the two are not the same number. At a ratio of 0.02 and a megahertz clock the model says 3.18 kilohertz and the circuit does 3.15 — 0.99 per cent low.

What that discrepancy depends on is the interesting part. It contains neither capacitance and it contains no clock: it is a function of the ratio alone. One per cent needs a ratio under 0.0201, ten per cent needs 0.2138, and the first of those is the number a designer actually works to.

The rule of thumb, made into a number #

“The clock has to be much higher than the signal” is the way this condition is normally stated, and the ratio bound turns it into an arithmetic fact.

At a ratio of 0.0201 the corner sits at $3.17\times10^{-3}$ of the clock, so the clock is 316 times the corner. At a ratio of 0.05 it is 129 times and the corner is 2.5 per cent out; at 0.1 it is 66 times and 4.8 per cent out.

So “much higher” means about three hundred for one per cent of accuracy in the corner, which is a good deal more than most people’s intuition and is why switched-capacitor filters run at clocks that look extravagant beside their passbands. It is also why the technique needs a process that can make a fast clock cheaply, which is exactly what an integrated one is.

The images, which no continuous model has #

The second difference is not a matter of degree, and it is the one that turns a switched-capacitor filter into an anti-aliasing problem rather than a filter.

A discrete-time response is periodic in frequency. The response repeats at every multiple of the clock, so a signal at $f_{\text{clk}} - f$ is treated exactly as a signal at $f$. Measured on the circuit: the magnitude at 3.15 kilohertz is 0.707307, and at 996.85 kilohertz it is 0.707307, and at 1,003.15 kilohertz it is 0.707307, and at 1,996.85 it is 0.707307 again. Not nearly — to the six figures printed.

A continuous $R$–$C$ at 996.85 kilohertz is 47 decibels down. The circuit that is supposed to be one passes the signal at the same level it passes something at the corner.

That is not a defect to be repaired inside the filter; it is a property of sampling, and the repair is a continuous filter in front of it. Which is the ordinary situation for anything that samples, and it is the reason a switched-capacitor filter is always preceded by a modest passive one whose only job is to make sure nothing arrives near the clock.

The charge has to arrive #

The third condition is the one nobody states and it bounds the clock from above — the opposite direction from everything else in this field.

The switched capacitor charges through the switch’s own on-resistance. It reaches $1 - e^{-T/2R_{\text{on}}C_s}$ of the way in the half period it is given, so the charge moved per cycle is short by exactly that factor, and the equivalent resistance is correspondingly larger than the expression says:

$$R_{\text{eq}} = \frac{1}{f_{\text{clk}}C_s\left(1 - e^{-1/2f_{\text{clk}}R_{\text{on}}C_s}\right)}$$

With a picofarad through a kilohm at a megahertz the half period is five hundred time constants and there is nothing to measure. At a hundred and eight megahertz it is 4.6 time constants and the error is one per cent; at twice that clock it is five per cent and rising fast, because the shortfall is exponential in the clock period.

So the equivalence has a ceiling as well as a floor, and the two are set by different things: the floor by a capacitor ratio and the ceiling by a switch. Between them is a range of clock frequencies over which a switched capacitor is a resistor, and outside it there is a circuit that is doing something else.

Why a ratio is worth building a technique around #

The reason all of this is worth the trouble is one sentence long and it is about fabrication rather than about circuits.

An absolute capacitance on an integrated circuit is a dielectric thickness times an area, and the thickness is a process parameter with a tolerance of perhaps twenty per cent that also moves with temperature. A ratio of two capacitances on the same die is an area ratio: the thickness divides out, the temperature coefficient divides out, and what is left is lithography, which is good to a fraction of a per cent.

Every number in this essay that matters is a ratio. The corner is $f_{\text{clk}}C_s/2\pi C_h$, and the clock comes from a crystal, so the corner’s accuracy is the crystal’s accuracy times the capacitor ratio’s. A continuous $R$–$C$ on the same die has a corner set by a resistance times a capacitance, neither of which is controlled, and a twenty per cent tolerance on each gives a corner good to forty per cent.

That is the trade in full: give up direct current, accept a sampled response with images, hold the ratio under a fiftieth and the clock under a limit set by a switch, and get a corner frequency as accurate as a crystal on a process that cannot make a resistor at all.

The stray that would ruin it, and the arrangement that ignores it #

There is a fourth condition, and the reason it is not on the list above is that the standard arrangement of the switches removes it rather than bounding it — which is worth an aside, because it is the same manoeuvre the ladder realisation uses against component sensitivity.

Every node on a die has a stray capacitance to the substrate of a few tens of femtofarads, and the switched capacitor’s own plates have one each. A naive arrangement charges the stray along with the capacitor, so the charge moved per cycle is $(C_s + C_{\text{stray}})\Delta V$ and the equivalent resistance is wrong by the ratio of the two — which for a small $C_s$ is enormous, and worse, is set by a quantity no process controls.

The arrangement everybody uses instead switches both plates, so that the stray on each plate is charged from a fixed node to a fixed node every cycle and therefore moves no charge into the summing node at all. It costs two more switches and makes the equivalent resistance depend on $C_s$ alone.

The reason to mention it here is the shape rather than the detail. A quantity that cannot be controlled has been made not to matter, instead of being bounded — the same move as taking a filter’s feedback from a doubly terminated ladder rather than from a cascade, and the same move as reading a resistance with four terminals rather than two.

What it cannot do at all #

Two things are outside the technique rather than at the edge of it, and both follow from the same fact.

It has no response at direct current in the sense that matters: there is no path at all between the two nodes except during a switching event, so an offset on the input is transferred as faithfully as a signal, and any charge injected by the switches themselves is transferred too. A real switch dumps a few tens of femtocoulombs of channel charge when it opens, and on a picofarad that is tens of microvolts, every cycle, in the same direction. Correcting it is the whole subject of correlated double sampling and it is not a filter question.

And its noise does not fall with the equivalent resistance. The noise a clock does not make is the measurement: a hundred-megohm resistor has a density of 1.27 microvolts per root hertz and the arrangement behaving as one has none of it, because what lands on the holding capacitor is $kT/C$ with the holding capacitor in it and nothing else — not the clock, not the switched capacitor, not the on-resistance — and it is exact rather than asymptotic at every capacitor ratio from a thousandth to ten. That happens to be good news, and it is good news for a reason that has nothing to do with the technique being clever: the total that has no resistor in it shows that a resistor charging a capacitor gives the same total whatever its value, because the density rises as its square root while the noise bandwidth falls as its inverse — five decades of resistance giving five decades of corner, two and a half decades of density, and one total of 63.2762 microvolts. The switched arrangement inherits the total and escapes the density.

The half of that story which is genuinely a cost is measured one rung further along. The amplifier inside the sample finds the amplifier in the same loop behaving in the opposite way in every respect: its noise is white, it is sampled, and the number of times it folds into the band is exactly the number of time constants the settling needs. So the switches set the floor below sixty megahertz and the amplifier sets it above, and asking for two more bits of settling — which is the same settling requirement this essay’s third condition is about — costs fifteen per cent more noise before anything else has changed.

Where it sits among the boundaries #

Three of this collection’s recurring shapes appear in one circuit here, which is unusual enough to be worth naming.

There is a model with a two-sided range, like a band rather than an edge and the square law: a clock too slow gives a corner in the wrong place and a clock too fast gives an equivalent resistance in the wrong place, and the middle is where the label on the schematic is true. That essay’s switch is the closest relative and its shape is the same one: a switch is a switch only for loads between 49.5 ohms and 1.01 megohms, bounded at both ends by the same part, with the upper end a frequency as well as a resistance so that the band narrows as the frequency rises and shuts completely at 6.43 megahertz.

There is a parasitic that is the component: the switch’s on-resistance, which in the ideal picture is nothing at all, is what sets the upper limit.

And there is a quantity that survives what destroys everything else: the capacitor ratio, which is the only number in the circuit a fabrication process reproduces, and around which the whole technique is arranged.

What that ratio is bought at is measured on the two rungs above. The filter that samples takes the second of the three conditions — a signal below half the clock — and shows it failing in a way no continuous model reports: an input at 992 kilohertz arrives at 7.8 kilohertz with the passband’s own gain, where the continuous model this essay fits says it is 56 decibels down. And the offset that knows the signal takes the switch, whose on-resistance appears here only as a settling time, and finds it leaving charge behind: the gate oxide capacitance times the channel area times an overdrive that depends on the input twice over, so that 5.67 mV of apparent offset moves by 1.86 mV across a volt of signal — a gain error of 0.186 per cent and only 3.4 µV of anything a data sheet would call an offset. The arrangement that fixes it is not a better switch but an ordering: opening the summing-node switch first divides the gain error by the amplifier’s own gain, exactly.

The noise field has the third of the technique’s surprises, and it is the one that goes the right way. The noise a clock does not make asks what a switched capacitor behaving as a hundred megohms does about the 1.27 µV/√Hz a hundred megohms of resistor would produce, and the answer is none of it: what lands on the holding capacitor is $kT/C$ with the holding capacitor in it and nothing else — not the clock, not the switched capacitor, not the on-resistance — exactly rather than asymptotically, at every capacitor ratio from a thousandth to ten.

What the technique gives up #

A resistor made of a clock buys accuracy and gives up three things this field measures separately. The filter that samples is the images, which no continuous model of the filter contains. The noise a clock does not make is the kT/C floor, which the technique cannot lower without a larger capacitor. The half that never arrives is the charging energy it pays thousands of times a second. The inductor that is an amplifier is the other synthesised component in the field, with a quite different list, and A ladder is not a cascade is the sensitivity argument both are trying to inherit.

What is checked #

Four assertions, and the fourth is the one that bounds the clock from above.

That the exact corner of the sampled circuit is below the corner its continuous model predicts, at every ratio the slider offers — a direction, not a tolerance, so a sign error in the pole would fail it.

That the model’s corner is exactly the equivalent resistance with the holding capacitor, to the last bits of a double, which is a check that the comparison is between the two things it claims to be between and not between two versions of the same one.

That a signal a corner’s distance below the clock comes through exactly as well as one at the corner, to nine figures, which is the image stated as an equality rather than as a warning.

And that the clock at which incomplete settling costs one per cent is a solved number, with the error growing as the clock rises rather than falling — the opposite direction from every other edge in this field, and the reason it is worth asserting the direction rather than the value.

That last direction is worth one more sentence, because it is what makes the technique’s three conditions a genuine box rather than a list. Two of them want the clock high: the corner is a fraction of the clock, so a slow clock puts the filter where it was not wanted, and the images sit at the clock so a slow clock brings them down into the band. The third wants it low, because the charge has to arrive within a clock period through a resistance that is not zero. A design is therefore squeezed from both sides in the same variable, and the width of what is left is set by the ratio between the switch’s on-resistance and the sampling capacitor — which is to say by the fabrication process rather than by anything on the schematic.