Circuit Response
every model has an edge, and the figure carries it
Concept

Switched capacitor — where it appears

A capacitor shuttled between two nodes by a clock, moving a fixed charge each cycle and so behaving as a resistance set by the clock rate. The substitution is bounded three ways at once: by the capacitor ratio, by the clock repeating the response, and by the charge having to finish arriving.

Named by 5 essays across 2 fields — each of them below, with the objects they name alongside it.

kT/C, on a circuit whose resistance is a clock and moves by 1e+4. computed by solving, not by drawing. The noise a switched-capacitor low-pass leaves on its holding capacitor, against the ratio of the two capacitors, measured by marching a seeded sequence through the recursion the circuit obeys. It is 6.328 µV at every ratio drawn — kT/Ch, with the holding capacitor and nothing else in it — while the resistance the arrangement behaves as moves from 1.00 kΩ to 10.0 MΩ across the same axis. The two lines below it are the two sampling events that make it: what the input switch leaves on the switched capacitor, and what the sharing switch leaves behind when it opens. Neither is the answer and their sum is, exactly, because the pole's own bandwidth factor is the same expression.

The noise a clock does not make

A hundred-megohm resistor has a noise density of 1.27 microvolts per root hertz. A switched capacitor that behaves as a hundred megohms has none of it: the noise on the capacitor it charges is kT/C, with the holding capacitor in it and nothing else — not the clock, not the switched capacitor, not the on-resistance. And it is exact rather than asymptotic, at every capacitor ratio from a thousandth to ten.

noise · Kt over c The switches set the floor below 60.2 MHz and the amplifier sets it above. computed by solving, not by drawing. The two contributions to a switched-capacitor stage's noise floor, against the clock frequency. √(kT/C) is 63.3 µV on a 1 pF hold capacitor and does not move with the clock at all. The amplifier's own 4 nV/√Hz is white and is sampled, so all of it folds into the band: settling to 12 bits in half a clock period needs 8.32 time constants, the closed loop's noise bandwidth is then 8.32 clocks over two, and the number of folds is 8.32 — the same number, exactly. The marched route is a seeded white sequence put through the settling exponential and sampled once per clock, and it agrees with the closed form to 0.05% of variance. The two floors are equal at 60.2 MHz, above which a larger capacitor buys nothing.

The amplifier inside the sample

kT/C is exactly independent of the clock, of the capacitor ratio and of the switch resistance — two essays measured that and found it identically true rather than nearly so. The amplifier in the same loop behaves in the opposite way in every respect: its noise is white, it is sampled, and the number of times it folds into the band is exactly the number of time constants the settling needs. So the switches set the floor below sixty megahertz and the amplifier sets it above, and asking for two more bits of settling costs fifteen per cent more noise before anything else has changed.

noise · Kt over c A switched capacitor is a resistor below a ratio, not below a frequency. computed by solving, not by drawing. The exact response of a capacitor shuttled between the input and a holding capacitor at 1.00 MHz — a difference equation with one pole, evaluated on the unit circle — against the continuous R–C its equivalent resistance is supposed to make. The corner is 3.15 kHz against the model's 3.18 kHz, 0.99% out, and the discrepancy is set by the capacitor ratio alone: one per cent needs a ratio under 0.0201, which is a clock 315 times the corner. The second difference has no counterpart at all — the sampled response repeats at the clock, so the image rising on the right of this plot is signal at 997 kHz arriving as though it were at the corner. The third is settling: 1 pF charged through 1 kΩ gets 500.0 time constants a half period at this clock, and being short of full charge raises the equivalent resistance by 0.000%, which puts a ceiling on the clock at 108 MHz.

A resistor made of a clock

A capacitor shuttled between two nodes at a megahertz behaves as a megohm, and a tenth of a picofarad shuttled at ten kilohertz behaves as a gigohm — which is how a filter with a one-hertz corner fits on a chip. What the equivalence costs is three conditions, and they bind on three different quantities: a capacitor ratio under 0.0201, a signal below half the clock, and a clock below the frequency at which the charge stops arriving.

filters · Switched capacitor A switched-capacitor low-pass driven past half its own clock. computed by solving, not by drawing. The clock is 1.00 MHz and the corner the rung below fitted is 1.59 kHz. The falling dashed curve is that continuous model, which knows nothing about a clock and goes on falling. The circles are the marched circuit, read at the frequency the output actually appears at. They part company past half the clock and by 992 kHz the model is 42.1 decibels wrong — an input just below the clock arrives just above direct current, in the middle of the passband, with the passband's own gain. The third curve is the exact discrete transfer function evaluated at the folded frequency, and it agrees with the march to 0.26 decibels, which is what says the march is measuring the folding rather than an artefact of itself.

The filter that samples

The rung below built a resistor out of a clock and measured two ways it is not one: a settling time, and a corner that is a capacitor ratio rather than an R–C product. Both are errors in a value and both get smaller as the design gets better. This is an error of a different kind — the arrangement is not a continuous system at all, and nothing below half the clock shows it. An input at 992 kilohertz arrives at 7.8 kilohertz with the passband's own gain, where the continuous model the rung below fitted says it is 56 decibels down.

filters · Switched capacitor The "offset" a switch leaves moves by 1.863 mV across a volt of signal. computed by solving, not by drawing. The charge a switch leaves on a 1 pF hold capacitor, as the input it was sampling changes. It is W·L·C_ox·(V_gs − V_th) with the clock's high level for the gate, so it falls as the input rises for two reasons at once: less gate drive, and a threshold that rises with the source potential through the body effect. The dashed line is the part that does not know what the signal is — the clock coupling through the gate overlap capacitance, -1.649 mV — and it is the only part of this that is honestly an offset. The curve stops where the switch does: an n-channel device passes nothing within a threshold of its own gate, and the model refuses rather than returning a zero.

The offset that knows the signal

The charge a switch leaves on the capacitor it was sampling is the gate oxide capacitance times the channel area times the overdrive, and both terms in that overdrive depend on the input — one directly and one through the body effect. So the 5.67 mV a data sheet would call an offset moves by 1.86 mV across a volt of signal, which is a gain error of 0.186 per cent and only 3.4 µV of anything else. Opening the summing-node switch first divides the gain error by the amplifier's own gain, exactly, and what is left goes from twenty-nine times the sampled-noise floor to nineteen times below it.

filters · Switched capacitor

Named alongside it

The objects these essays reach for when they reach for this one.

AliasingKt over cEquivalent resistanceModel rangeSampled dataSampled noiseSettling timeAnti-alias filterCapacitor ratioCharge injectionDesign tradeoffDevice mismatch

All concepts