Circuit Response
every model has an edge, and the figure carries it
Feedback, and the margin

The load that neither limit owns

Nine rungs of this argument asked which of an amplifier's two large-signal limits binds, and drew the load capacitance where the answer changes hands. Both are present at every load: the excursion with both in the netlist is the two departures added and between 2 and 12 per cent more, never the larger of them. So the crossing is not a handover but a maximum — at 12 nanofarads the pair costs 2.084 times what the worse of them costs alone, against 1.35 at 2.2 nanofarads and 1.07 at 47 — and the same peak sits on the resistance axis at 20 ohms and the gain-bandwidth axis at 50 megahertz.
16 min read 7 figures Every model has an edgeMeasured, not tabulatedThe constants decide

Assumes: The load that gets inside the loop · The step that is too big · One step, computed twice

The current above which there is no impedance put a second large-signal limit into a capacitively loaded stage and asked which of the two decides the answer. The input pair has one — a slew rate of twice the thermal voltage times the gain–bandwidth in radians, with no design choice in it at all — and a real output stage has another, a largest current it can supply, which is nothing but design choice. That essay found the two changing places at a load capacitance, drew the crossing, and named it a handover.

The measurement it drew that from runs four marches of the same netlist at every point: neither limit present, the input pair’s limit alone, the output stage’s alone, and both. Three of those four were used. The fourth — the one with both limits in the circuit at once, which is the only one that is a model of a part — was computed at every point, checked against a floor, and plotted nowhere.

What it says is that the word binds was doing more work than the numbers support.

Two large-signal limits, each alone and then both, at 20 mA and half of it. computed by solving, not by drawing. Four marches of one netlist at each load: neither limit, the input pair's tanh alone, the output stage's 20 mA alone, and both, driven by a 10 mA step. The three curves are each limit's departure from the linear march and the departure with both present; the faint line is the two singles added. Both lies on the sum and a little above it — 1.112 times it at 0.47 nF and 1.022 at 47 nF — so the limits are present together rather than taking turns. Where the two singles cross, near 10 nanofarads, the pair costs 1.88 times what the worse of them costs alone.
Fig. 1 Four marches at each load, with a 10 mA step against a 20 mA output stage. The solid curve is the input pair’s departure from the linear march, the second is the output stage’s, the heavy one is both limits present together, and the dashed line is the arithmetic sum of the first two. Both lies on the sum and a little above it — 1.112 times it at 0.47 nF, 1.022 at 47 nF.

What is being solved

The stage is unchanged from the rung below. A transconductor whose current is the differential pair’s own hyperbolic tangent, a compensation capacitor, a buffer with an output resistance of 50 ohms, an isolation resistor and the load capacitor, closed by two ten-kilohm resistors. A step of load current is injected at the load node and the node voltage is marched.

The output stage’s limit is written as a hyperbolic tangent too, and for the same reason: a real stage’s limit is smooth, and the small-signal transconductance at the origin is exactly the reciprocal of the output resistance, so the linear behaviour of the rungs below is untouched by construction. That is the point of writing it that way rather than as a clamp, and it is why the same netlist can be marched with the limit in or out and the difference attributed to the limit alone.

The quantity compared is each limit’s departure: the excursion of the marched output divided by the excursion of the same netlist marched with no limit at all, minus one. Comparing the raw excursions instead reads as the two are within a few per cent at every load, because most of the excursion is the linear answer that all four marches share — and that is a real trap rather than a hypothetical one, since the whole of the effect being measured sits in the last few per cent of a number the four have in common.

The reproduction, which comes before the departure

Two things have to hold before a difference between marches means anything, and both are checked at every point rather than argued for once.

The first is the one the step too large to have an impedance established: the linear march’s excursion divided by its step is the same number at every step size, to a part per million across four decades. That is what makes the word impedance apply to it, and it is what makes the departures meaningful, because a linear reference drifting by a per cent would swamp the 2.5 per cent departures measured below.

The second is Kirchhoff’s current law rebuilt from the element relations at every step of every march — the capacitor contributing its own current from its two stored states, the tanh devices contributing their own functions at their own solved voltages — rather than from the companion models the step used. A sign error in a companion survives every plot and does not survive that residual. It is the pairing one step computed twice is about, and it is why a four-way comparison of marches is allowed to be quoted to three figures.

Which limit binds is a property of the load, and they change places near 22 nF. computed by solving, not by drawing. Each limit measured on its own, as the departure of its march from the linear one, at a load step of half the output stage's rating. The input pair's departure falls with load capacitance — a bigger reservoir holds the node while the loop responds, which is the sixth rung's own result — and the output stage's does not fall nearly as fast, because what it has to supply is the charge the capacitor wants. Below about 22 nanofarads the thermal voltage decides the answer and above it the output stage does, and nothing about the amplifier changed.
Fig. 2 The figure the rung below drew from the same four marches: each limit measured alone, as its departure from the linear one. The input pair’s falls steeply with load capacitance and the output stage’s does not, so the two cross. Below the crossing the thermal voltage decides which departure is the larger and above it the output stage does.

The departure

At every load in the sweep, the excursion with both limits present is larger than the excursion with either alone — which the rung below asserted, weakly, as at least as large as the larger limit alone. It is a great deal more than that. It is larger than the two of them added.

At 2.2 nanofarads the input pair’s departure is 13.28 per cent, the output stage’s is 3.06, their sum is 16.34, and the departure with both present is 17.93 — 1.098 times the sum. At 0.47 nanofarads the three numbers are 19.43, 4.24 and 26.33 against a sum of 23.67, a factor of 1.112. At 47 nanofarads, where the input pair has almost nothing left to contribute, it is 0.06, 1.45 and 1.54 against a sum of 1.51, a factor of 1.022.

The excess over the sum runs between 2 and 12 per cent and it grows with the size of the departures, which is what a mild second-order coupling looks like. The first-order statement is the one that matters: the two limits add. Neither stands in for the other, neither is masked by the other, and there is no load at which one of them is doing the damage and the other is standing by.

That is not what binds means. A limit that binds is a limit that has taken over; the other one is then not the constraint. What the marches show is two constraints, both active, both costing what they cost, all the way along the axis. The rung below identified, correctly, which of the two costs more at each load. It then read that comparison as an account of the mechanism, and it is not one.

Why they add rather than take turns

The two limits act at different terminals and at different moments, which is the whole of it.

The input pair’s limit is reached when the error between the amplifier’s two inputs exceeds a few thermal voltages, and the error is what is left of the load node’s excursion after the feedback divider has halved it. It is therefore caused by the excursion, and it is largest at the instant the excursion is largest. The output stage’s limit is reached when the current the loop is asking the buffer for exceeds what the buffer has, and that current is the load capacitance times the rate at which the loop is trying to move the node — largest during the recovery, after the excursion has peaked.

So one limit is a response to how far the node went and the other to how fast the loop is trying to bring it back, and neither removes the condition that triggers the other. Worse: each lengthens the other’s opportunity. A transconductor running out of drive means the node is corrected more slowly, which means the output stage is asked for its current for longer; a buffer running out of current means the node stays away from where it should be, which keeps the input error large. That is the reading that fits an excess over the sum of a tenth, and it is the same shape of coupling as the one the resistor that buys the margin back prices in the small-signal case, where a quantity is moved rather than removed.

None of that is a mechanism this measurement can separate from any other of the same size, and the section below on what this does not say makes that explicit. What the measurement does establish is the first-order behaviour, which is addition, and addition is what makes the next paragraph follow.

The consequence, which is that a boundary is a maximum

Follow the arithmetic. If the two departures add, then what both limits cost relative to what the worse of them costs alone is one plus the ratio of the smaller to the larger. That expression is largest when the two are equal — and where the two are equal is precisely the crossing the rung below drew.

So the boundary between the two regimes is not a neutral line across the axis. It is the worst place on it.

The crossing is a maximum, on the load capacitance as on the other two. computed by solving, not by drawing. Four marches of the same netlist at each of 9 settings of the load capacitance, with a 10 mA load step against a 20 mA output stage. The lower panel is the input pair's departure divided by the output stage's, and it passes through one near 12 nF — that is the crossing the ladder below found on the load axis and called a handover. The upper panel is what both limits together cost over what the worse of them costs alone. It is above one everywhere, so both are always present, and it is largest — 2.084 — at the same setting, because that is where the smaller of the two has the most left to add.
Fig. 3 The lower panel is the input pair’s departure divided by the output stage’s, passing through one at 12 nanofarads. The upper panel is what both limits together cost over what the worse of them costs alone: above one everywhere, so both are always present, and peaking at 2.084 at the same capacitance. It is 1.47 at 4.7 nF and 1.43 at 22.

The numbers at the peak are worth having in volts. With a 12-nanofarad load and a 10-milliamp step, the linear march’s excursion is 138.4 millivolts. With the input pair’s limit alone it is 141.9; with the output stage’s alone it is 141.9 as well, to four figures, which is what the crossing means. With both it is 145.7. Each limit on its own costs about three and a half millivolts and the two together cost seven and a third.

The recovery goes the same way and further. The linear march settles in 1.13 microseconds, the input-limited one in 1.15, the output-limited one in 1.26, and the one with both in 1.635 — an excess over the linear march of 0.02, 0.13 and 0.505 microseconds, where the sum of the first two is 0.15. The recovery time is worse than additive by considerably more than the excursion is. The march resolves time in five-nanosecond steps, so the smallest of those three excesses is four steps and should not be pressed past its first digit; the largest is a hundred and one steps and is not in question.

The same peak on two other axes

A peak that appears only on the axis it was looked for on is a coincidence. The load capacitance is not the only thing that moves the two departures relative to each other, and two others are already parameters of the same stage.

The crossing is a maximum, on the output stage's resistance as on the other two. computed by solving, not by drawing. Four marches of the same netlist at each of 9 settings of the output stage's resistance, with a 10 mA load step against a 20 mA output stage. The lower panel is the input pair's departure divided by the output stage's, and it passes through one near 20 Ω — that is the crossing the ladder below found on the load axis and called a handover. The upper panel is what both limits together cost over what the worse of them costs alone. It is above one everywhere, so both are always present, and it is largest — 2.104 — at the same setting, because that is where the smaller of the two has the most left to add.
Fig. 4 The output stage’s own resistance, swept from 5 to 200 ohms at a fixed 2.2-nanofarad load. The ratio of the two departures walks from 0.077 to 24.3 and passes one at 20 ohms; the cost of having both limits peaks at 2.104 at the same 20 ohms, and falls to 1.09 and 1.13 at the two ends.

That axis is the more surprising of the two, because sweeping the output resistance moves the input pair’s departure from 0.115 per cent to 70.3 while the output stage’s stays between 1.50 and 3.06 across a factor of forty in resistance. The output resistance and the load capacitance are a lag inside the loop, so a larger resistance means a longer and larger excursion at the gain node and a correspondingly larger input error; what the output stage has to supply is set by the charge the capacitor wants, which that resistance does not change. The two departures cross because one of them moves and the other does not.

The crossing is a maximum, on the gain–bandwidth as on the other two. computed by solving, not by drawing. Four marches of the same netlist at each of 9 settings of the gain–bandwidth, with a 10 mA load step against a 20 mA output stage. The lower panel is the input pair's departure divided by the output stage's, and it passes through one near 50 MHz — that is the crossing the ladder below found on the load axis and called a handover. The upper panel is what both limits together cost over what the worse of them costs alone. It is above one everywhere, so both are always present, and it is largest — 2.017 — at the same setting, because that is where the smaller of the two has the most left to add.
Fig. 5 The gain–bandwidth product, from 1 to 120 megahertz at the same load. The ratio passes one at 50 megahertz and the cost of both limits peaks there at 2.017. Both quantities in the input pair’s limit scale with the gain–bandwidth — the slew rate is twice the thermal voltage times it — so the axis moves the slew rate from 0.325 to 39 volts a microsecond.

Three axes, three peaks, and each one sits at the sample where the two departures are most nearly equal: within 1.3 per cent of equality on the load axis, 4.1 per cent on the resistance axis and 12.2 per cent on the gain–bandwidth axis, the last of those being how finely that axis was sampled rather than how well the rule holds. Each peak is interior to its sweep rather than at an end of it, and each is between 1.46 and 1.93 times the smallest value on its own axis, so it is a feature and not a wobble.

The rule behind all three is arithmetic rather than physics, which is why it does not care which axis it is on. It is the statement that a sum of two positive quantities, divided by the larger of them, is largest when they are equal — and it is worth stating that plainly, because it means the peak is evidence for additivity rather than a separate finding. A pair of limits that genuinely took turns would produce a flat line at one on those upper panels.

Which limit binds is a property of the load and of the step

There is a second assumption in the rung below, and it is in the title of its own figure: which limit binds is a property of the load. That figure fixed the step at half the output stage’s rating and swept the load. The step is a free variable and it moves the answer.

The boundary between the two limits is a curve, and the ladder below read one line of it. computed by solving, not by drawing. Twenty settings of load and step, each four marches, with a 20 mA output stage. Dots are loads where the input pair's departure is the larger and crosses are loads where the output stage's is; the line through them is where the two are equal, interpolated between the bracketing loads. It runs from 12.70 nanofarads at a 1 mA step to 9.33 at 18 mA — a factor of 1.36 across the whole range of steps the stage can supply. So the boundary is a property of the load to within a third, and the remainder is the step.
Fig. 6 Twenty settings of load and step, four marches each, against a 20 mA output stage. Dots are settings where the input pair’s departure is the larger and crosses are settings where the output stage’s is; the line is where the two are equal. It runs from 12.70 nanofarads at a 1 mA step to 9.33 at 18 mA.

The boundary is a curve rather than a point, and the honest summary of it is that the rung below was nearly right. Across the entire range of steps the stage can supply without running out of current, the crossing moves from 12.70 to 9.33 nanofarads — a factor of 1.36. So the load decides the answer to within about a third and the step decides the rest, and a designer choosing which data-sheet figure to read for a given load is not misled by ignoring the step.

The bisected crossing at the half-rating step is 12.12 nanofarads, which falls where this figure’s interpolated boundary puts it, between the 12.50 at 6 milliamps and the 11.76 at 12. Those two locations of one quantity share their marches and are therefore not independent; what they check is that the interpolation between bracketing loads and the bisection on the verdict agree about where the verdict changes, which is a check on the interpolation.

Above the rating the question stops being askable at all, and the rung below established why: the limited stage cannot supply the current the load is drawing, the output does not return within the window, and the departure that comes back is a property of how long the march ran rather than of the circuit. Every step in the figure above is below the rating for that reason.

At a different rating

The output stage’s rating is the one quantity in all of this that is a decision rather than a consequence, so the whole picture should move when it moves, and in one particular direction: a larger rating means a smaller output-stage departure at a given load, so the crossing should go to a larger capacitance.

Two large-signal limits, each alone and then both, at 50 mA and half of it. computed by solving, not by drawing. Four marches of one netlist at each load: neither limit, the input pair's tanh alone, the output stage's 50 mA alone, and both, driven by a 25 mA step. The three curves are each limit's departure from the linear march and the departure with both present; the faint line is the two singles added. Both lies on the sum and a little above it — 1.119 times it at 0.47 nF and 1.122 at 47 nF — so the limits are present together rather than taking turns. Where the two singles cross, near 47 nanofarads, the pair costs 1.50 times what the worse of them costs alone.
Fig. 7 The same four marches against a 50 mA output stage, driven at half of that. The crossing has moved from between 10 and 22 nanofarads to between 22 and 47, and the peak cost of having both limits is 1.50 rather than 1.88. The excess of both over the sum is 1.119 at 0.47 nF and 1.122 at 47.

The crossing moves as expected and the excess over the sum does not — it stays between 8 and 13 per cent across the whole sweep at the larger rating, as it stayed between 2 and 12 at the smaller. That is the part of the result that is about the two limits rather than about their sizes, and it is the part that survives the change of part number.

What also survives is the shape of the input pair’s departure, because the quantity behind it survives: the slew rate is 3.249 volts a microsecond in both figures, being twice the thermal voltage times the gain–bandwidth in radians and containing nothing a designer chooses. It moves with the room in the way the edges that move with the room collects, and it is the same kind of boundary as how small is small signal: a limit in the pair’s own units, which happens to be measured in amps here because the circuit converts it.

What this does not say

It does not say the rung below drew the wrong crossing. The crossing is where it said, both routes to it agree, and identifying which of two limits contributes more at a given load is a real and useful thing to know.

It does not say the isolation resistor and the second feedback path are irrelevant here. Both are in the netlist and both change the numbers — the isolation resistor is part of the lag that what the load sees looking back measures from the other terminal, and the two-path arrangement of the path that buys the error back is a different feedback topology whose departures have not been measured at all. Everything above is the amplifier-feedback arrangement with a ten-ohm isolation resistor, which is one of the two the ladder carries.

It does not say the two limits interact through some third mechanism. Between 2 and 12 per cent above the sum is a mild coupling, and the reading that fits it is that each limit lengthens the interval during which the other is being asked for more than it has. Nothing here separates that explanation from any other with the same size, and separating them would need a march instrumented to report which device was saturated at each instant, which these are not.

And it does not say anything about a rail. Every march above holds the supply perfectly still. The rail the load moves gives it an impedance and finds this channel’s own output impedance changing by three parts in ten million, so the omission is nearly free for the quantity measured here — but the output stage delivering its rated current into a capacitor is exactly the condition that moves a rail, and the interaction between a current limit and the voltage headroom above it remains the oldest unmeasured item on this ladder. Two rungs named it before the seventh did and none has drawn it.

The number worth carrying

Two point zero eight four, at twelve nanofarads.

That is what two large-signal limits cost together at the load where they are equal, against what the worse of them costs alone, and the number is a little over two because the two limits add and the excess over the sum is under a tenth. The habit that goes with it is shorter than the measurement.

A comparison is not a decomposition. Asking which of two effects is larger produces a ranking, and a ranking invites the reading that the larger one is the effect and the smaller one is a correction — which is a claim about superposition that nothing in a large-signal problem entitles anyone to make. The way to find out is to build the case with both present and compare it against the two singles, which is one more march out of four rather than a new experiment, and the collection’s own habit of demanding a second route says to do it: what a network answers is where two quantities that must agree are made to, and the same discipline points the other way here, at two quantities that were never required to add and turn out to.

And the corollary is the one worth taking to a data sheet. Where a specification names two limits and a boundary between them, the boundary is the operating point at which both are being paid for, not the one at which responsibility changes hands — and every model has an edge is about edges that are regions rather than lines, arriving here from a direction the rest of that argument does not cover, since this edge is not fuzzy at all. It is sharp, and it is a maximum.

Part 10 on capacitive load

One argument about Capacitive load, and one of 10 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:

The resistors own the floor between 2.91k Ω and 85.9k Ω, and the part owns it outside. computed by solving, not by drawing. The noise at the load of the two-path compensation against the impedance of its own feedback network, with the resistors scaled together and the compensation capacitor taken down in proportion so that Rf·Cf — the handover between the two feedback paths — does not move. Four contributions are integrated over 10 Hz to 100 MHz: the amplifier's 4 nV/√Hz, fitted as the 0.005 power of the impedance and so flat; the two resistors' √(4kTR), the 0.501 power; and the amplifier's 0.60 pA/√Hz flowing in the feedback resistor, the 0.997 power. Two different powers of one quantity cross twice. The resistors carry more than half the power only between 2.91k Ω and 85.9k Ω; outside that window, in both directions, the part does. The part's share is least at 15.8k Ω, which is not eₙ/iₙ — it is that ratio multiplied by the noise gain of 2.000 and again by 1.187, the square root of the ratio of the bandwidths the two generators actually see; there it carries 26.26 per cent. The model stops where the amplifier's output current does: at 100 Ω the feedback resistor alone draws 10 mA a volt. The window the resistors own Part 9 — Eight essays have priced one compensated stage, and the fourth of them left two of the amplifier's own generators named and uncounted. With the current generator put in the netlist the floor at ten kilohms goes from 28.88 microvolts to 30.13, and the resistors carry more than half the noise power only between 2.91 kΩ and 85.9 kΩ — outside that window, in both directions, the part does. The flicker corner turns out to be worth 1.00009 in this stage's own band, and 3.474 one band away.

Where this goes next

Which limit binds is a property of the load, and they change places near 22 nF. computed by solving, not by drawing. Each limit measured on its own, as the departure of its march from the linear one, at a load step of half the output stage's rating. The input pair's departure falls with load capacitance — a bigger reservoir holds the node while the loop responds, which is the sixth rung's own result — and the output stage's does not fall nearly as fast, because what it has to supply is the charge the capacitor wants. Below about 22 nanofarads the thermal voltage decides the answer and above it the output stage does, and nothing about the amplifier changed. The current above which there is no impedance The sixth rung found the impedance leaving at 10.6 mA, where the input pair's own tanh takes over and the slew rate is twice the thermal voltage times the gain-bandwidth in radians, with no design choice in it. A real output stage has a second limit that is nothing but design choice, and the two do not bind at the same load: at 0.47 nF the input pair's departure is 19.4 per cent against the output stage's 4.2, at 22 nF it is 0.9 against 2.3, and above the output stage's rating the excursion does not come back at all — 2,254 Ω for a quantity that was 37. The step at which the output impedance stops being a number. computed by solving, not by drawing. The excursion divided by the step, against the step. The flat line is the linear model, and it is flat to 0.0 parts per million across four decades — which is what an impedance is. The rising curve is the same netlist with the differential pair's tanh in the transconductor, and it leaves at 10.6 mA: the input error there is 3.63 thermal voltages, so the boundary is an amplitude in the pair's own units rather than a current with the amplifier's name on it. At 300 mA the ratio is 54.5 Ω against the linear 23.6 — 131 per cent, and it is no longer a property of the circuit at all. The slew rate that decides it is 3.25 V/µs, which is twice the thermal voltage times the gain-bandwidth in radians, and contains no design choice. The step too large to have an impedance The rung below drove the load node with a current step and reported an impedance: a voltage divided by a current, which is a number only if the ratio does not depend on the current. Give the amplifier the differential pair's own tanh in place of a linear transconductor and it is a number up to 10.6 milliamps and not above — where the input error is 3.63 thermal voltages, and where the slew rate that decides it is twice the thermal voltage times the gain-bandwidth in radians, containing no design choice at all. The load sees 10.0 Ω, 1.2e-3 Ω or 1.2e-3 Ω at direct current, and the peak is lowest for the arrangement with both paths. computed by solving, not by drawing. The impedance at the load node of all three arrangements, measured by grounding the input and driving a unit current into the load. Feedback from the amplifier leaves the load looking at the isolation resistor — 10.0 Ω, with no loop gain in it at all. Feedback from the load gives 1.2e-3 Ω, and the two-path arrangement has the same, which is what its direct-current path is for. All three resonate with the load capacitance near 3.2 MHz, and the two-path arrangement's peak is the lowest — 27.6 Ω against 37.4 and 59.2. What it gives up is between: above the 159 kHz handover it has let go of the load node. What the load sees looking back Four rungs of this argument have measured what the amplifier does to the signal — the margin, the settling, the error, the noise. None has asked the question from the other end. A load that draws its own current sees an impedance looking back, and with the feedback taken from the amplifier that impedance is the isolation resistor, with no loop gain in it whatever: ten ohms, and a load step leaves an error that never goes away. The two-path arrangement recovers to a thousandth of it and charges for that in a quantity none of the four rungs below measured. One channel's load step reaches another through the supply, and the compensation decides by 4497×. computed by solving, not by drawing. Two identical amplifiers on one rail — sharing no signal node — with an ampere of load step pulled from the first and the second's output read. With the wiring left out the coupling is exactly zero, which is what the seven rungs below this one computed. With 30 nanohenries and fifty milliohms of rail and 10 microfarads of decoupling it is not: 3.84 microvolts per ampere at 271 kHz if the compensation capacitor returns to ground, and 17.29 millivolts per ampere at 2.33 MHz if it returns to the rail. That is a factor of 4497 decided by a modelling choice, which is why both are drawn. The channel that caused the step is unaffected: its own loop corrects the disturbance along with everything else, and the crosstalk is entirely a problem for the channel that did not. The rail the load moves Seven rungs of this ladder end by saying the same thing: the supply is an ideal voltage source, so a load step is drawn from a node that cannot be disturbed. Giving the rail an impedance turns out to change the disturbing channel's own output impedance by three parts in ten million — its loop corrects the supply along with everything else — and to open a path to a second amplifier that shares nothing with it but a wire. How large that path is is a modelling choice: 3.84 microvolts per ampere with the compensation capacitor returned to ground, 17.3 millivolts with it returned to the rail, a factor of four and a half thousand. An inverting unity gain driving 2.2 nF, and the pole that is inside the loop. computed by solving, not by drawing. Two ten-kilohm resistors around a 10 MHz amplifier make a gain of 1.00, and a loop that closes against 2.01 — one plus the ratio, not the ratio. Hanging 2.2 nF on the output leaves the closed-loop gain at a kilohertz unchanged — 0.99998002 against 0.99997988 — and takes the phase margin from 90.0° to 30.1°. The mechanism is at the other end of the amplifier from the summing-junction case and the arithmetic is the same: the load works against the amplifier's own fifty ohms of output resistance, which puts a second pole in the forward path — inside the loop, where the feedback has to live with it — while the gain the loop closes against does not move at all. Forty-five degrees is reached at 905 pF, bisected on the netlist. The capacitance is not part of the signal path and does not appear in any expression for the gain. The load that gets inside the loop Hanging a capacitor on an amplifier's output changes nothing a reader can find in any expression for its gain, and takes the phase margin of a unity-gain inverter from ninety degrees to thirty. The mechanism is fifty ohms of output resistance that no data sheet page puts next to the stability page: the load works against it, the pole that results is in the forward path, and forty-five degrees arrives at 905 picofarads — which is a metre of coaxial cable.

The objects named here

The third axis, after the field and the idea: the things themselves, and every essay that touches each one.

Capacitive loadDesign tradeoffLarge-signalMarchingModel rangeOutput impedanceSettling timeSlew rateThermal voltage