Circuit Response
every model has an edge, and the figure carries it
Concept

Limit cycle — where it appears

The periodic waveform a nonlinear circuit settles into, whose amplitude is set by the nonlinearity rather than by any pole of the linear model. Its frequency comes from the linear part of the circuit and its amplitude from the nonlinear part, so no analysis that drops either returns both.

Named by 8 essays across 2 fields — each of them below, with the objects they name alongside it.

Started from a millivolt at a gain of 3.20. The output grows by 1.8804 a cycle — the factor the poles give — and then stops, at 858 mV of amplitude and 1.58 kHz. The lower panel is the envelope on a logarithmic axis, where the linear model's prediction is the straight line that keeps going. What ends it is the diode pair across the feedback resistor, and no direct-current analysis of this circuit returns that number.

The amplitude nothing linear predicts

A linear model's poles say the envelope grows by 1.88 a cycle and never say when it stops. Two diodes across the feedback resistor stop it, at 858 millivolts — a number no pole, no transfer function and no bias point contains. Getting it needs a netlist with a nonlinearity in it, marched forward in time, and that pairing is what the whole field is built on.

applied · Oscillator The limit cycle's spectrum at a gain of 3.20. Ten lines of the settled waveform. The third is 5.692% of the fundamental and the fifth 0.982%; the second and fourth are 6.8e-7, which is the arithmetic's floor and not a small residue. Two diodes facing opposite ways make a symmetric characteristic and a symmetric characteristic produces no even harmonic at all.

What the limiter charges for

The diodes that set the amplitude are the only nonlinear thing in the loop, so every harmonic in the output is theirs. Across the gain slider the amplitude rises by a factor of 1.51 and the distortion by 15.4 — an amplitude that goes as the 0.11 power of the excess gain and a distortion that goes as the 0.74 power. Two diodes facing opposite ways produce no even harmonic at all, at seven parts in ten million, which is the arithmetic's floor rather than a small residue.

applied · Oscillator Two reasons the frequency is not 1/2πRC. The measured oscillation frequency sits below the network's own zero-phase frequency, and by two separate amounts. The amplifier's share falls as 1/ρ — the product of shift and ratio is constant to 6.7% over two decades — and the limiter's share is flat at 0.7713%. They are equal at ρ = 578, and above that a faster amplifier moves the frequency by nothing that matters.

The frequency that is not the formula

The Wien network's zero-phase frequency is one over two pi RC to every digit the arithmetic has. The circuit does not run there. With a perfect amplifier it runs 0.771 per cent low, because the limiter's harmonics are part of the waveform whose period is being measured; with a real one it runs lower still, by an amount inversely proportional to the gain-bandwidth product. The two are equal at a ratio of 578, and above that a faster amplifier buys nothing.

applied · Oscillator Twenty nanoseconds of skew is 0.28% of duty, not 0.40. computed by solving, not by drawing. The duty cycle of a relaxation oscillator whose comparator takes longer to go one way than the other, marched, against the expression that lengthens each half cycle by its own delay. The two part company immediately and by a constant factor of about 1.42: during a delay the capacitor keeps charging past the threshold it already crossed, so the next half cycle starts further out and takes longer, and the two halves partly cancel. At 200 ns of skew on a 2585 ns period the duty is 52.805 per cent where the expression says 54.004. The open circles are the same quantity in closed form — the overshoot is V(1 − (1 − β)e^(−d/τ)) and the next half starts from it — which the march reproduces to parts in ten thousand.

The delay that is two delays

Modelling one comparator delay applied to both transitions makes the two half cycles equal by construction, and the fix is a change of one line. Made, the duty cycle moves by 0.28 per cent for twenty nanoseconds of skew rather than the 0.40 the obvious expression gives, more hysteresis improves the duty cycle and worsens the volt-seconds at the same time, and ten nanoseconds of skew saturates a hundred-turn core in 231 cycles.

applied · Hysteresis The growth per cycle, and the form that is a fifth low at the top of the range. computed by solving, not by drawing. The factor the envelope is multiplied by each cycle, against the gain. The solid curve is exp(π(k−3)/√(1 − ((k−3)/2)²)), which is what the characteristic equation gives and what the netlist's own poles return to twelve digits; the dashed one is exp(π(k−3)), which drops the denominator. The circles are the marched envelope, fitted over the cycles that are still small — 80 of them at k = 3.01 and 4 at k = 3.2, and none at all above that. The two expressions differ by 3.9e-7 at k = 3.01 and by 20.462% at k = 3.8, so the approximation fails exactly where nothing is left to check it against.

Two exponentials, and where they meet

An oscillator's envelope grows by exp(π(k−3)/√(1 − ((k−3)/2)²)) a cycle, and the form usually quoted drops the denominator — exact to four parts in ten million at a hundredth above three, and 20.462 per cent low at 3.8, which is precisely where too few small cycles are left to measure it. Where the growth stops is the diode's own exponential: 108.5 millivolts of amplitude for every decade of saturation current, proportional to the ideality to four parts in a thousand. Above 60.121 nanoamperes the limiter is already conducting at zero signal and there is no oscillation at all.

applied · Oscillator Fed nothing, an eighth-order cascade sits 88 least significant bits from zero. computed by solving, not by drawing. Where each section of a 12-bit rounded cascade settles with zero input and a seeded state. Nothing decays to zero: a constant state survives whenever rounding returns it to itself, which needs only |y·(1 + a₁ + a₂)| ≤ q/2, and that denominator is small precisely because the corner is far below the sample rate. Each section's own band is 30, 31, 32, 33 least significant bits and the settled offsets are -27, -50, -70, -88 — accumulating, because a section's dead-band output is the next section's input and the next section passes direct current. In volts the offset halves with every bit added; in least significant bits it does not move at all.

Zero in, and not zero out

Rounding a filter's coefficients and marching it in double precision leaves out the other half: the products are rounded too. Put that in and a twelve-bit eighth-order cascade fed nothing at all settles two per cent of full scale away from zero and stays there — and the offset does not shrink with the word length, it grows as the square of how far the corner sits below the sample rate, reaching eighteen per cent at a hundred and twenty-eight times.

digital · Digital realisation Fed nothing, a 12-bit eighth-order cascade sits 88 least significant bits from zero; with its rounding error fed back, never more than 1. computed by solving, not by drawing. The same cascade with its corner at 1 kHz and its clock 48 times higher, each section's state seeded at eight least significant bits and every product rounded to 12 bits, marched with no input. Plainly rounded, the sections settle at 27, 50, 70, 88 least significant bits — a constant state survives whenever rounding returns it to itself, and each section's offset is the next one's input. With each section's last two rounding errors added back with weights −2 and +1, the error reaches the output through (1 − z⁻¹)²/A(z), a constant state y needs (1 + a₁ + a₂)·y = 0, and the only one is zero: the largest excursion over the last two thousand samples is 1, 1, 1, 1 least significant bit, single isolated steps rather than a settled offset.

The rounding a section keeps

A fixed-point biquad that remembers its last two rounding errors and adds them back with weights −2 and +1 before it rounds again sends its error to the output through (1 − z⁻¹)²/A(z) instead of 1/A(z). For a low-pass clocked far above its corner that double zero lands exactly on the recursion's largest gain. Fed nothing, an eighth-order 12-bit cascade at 48 times its corner sat 88 least significant bits from zero; with the error kept, a constant state needs (1 + a₁ + a₂)·y = 0, its only solution is zero, and the output never strays more than one bit at any clock rate from 8× to 128×. The round-off floor at 128× falls 89 times, 6.5 bits, for two additions and a shift per section — and the white-noise model, which the plain cascade broke by a factor of ten at eight bits, holds to 2.3% from six bits to twenty.

digital · Digital realisation A Wien oscillator with a lamp for its lower gain arm, τ = 100 ms: the envelope rings 63.6 times in ten time constants at 63.6 Hz and settles at 1.000 V. computed by solving, not by drawing: three state equations marched through every cycle of the 1.59 kHz carrier. The peak at the network's node, over its settled value (solid), from a millivolt with a cold filament, against time in units of the filament's time constant τ = 100 ms. Cold, the 50 Ω filament asks for a gain of 11 and the output sits on the 12 V rail until the filament has warmed. It leaves the rail after 1.99 ms, falls through the operating point, overshoots and rings at 63.6 Hz with a damping ratio of 0.0225. The dashed bound is the linear loop's decay, exp(−(1 + m)t/2τ) with m = 0.8, and it contains neither the carrier's frequency nor the amplitude. The settled amplitude, 1.000 V at the node and 3.00 V at the output, is the one at which the filament is at 250 Ω.

The lamp that has to be slow

A small lamp in a Wien oscillator's gain network adjusts the gain to whatever each unit needs, so the margin a limiter spends is no longer spent, and the price is an amplitude loop of its own. The envelope is an integrator and the filament is a lag, which makes a second-order loop that rings at the square root of 2ω₀m/τ and decays at (1 + m)/2τ. The filament's ripple at twice the carrier is the only distortion, 0.201/ω₀τ. So the slowness that lowers the distortion lengthens the settling in exact proportion: distortion times settling is 0.163 cycles at any time constant, and 0.01 per cent takes a second at 1.59 kHz and 82 seconds at 20 Hz.

applied · Oscillator

Named alongside it

The objects these essays reach for when they reach for this one.

Amplitude stabilisationDesign tradeoffBiquad cascadeModel rangeNoise floorNumerical errorOversamplingQuantisationRealisationTotal harmonic distortionWien bridgeBarkhausen criterion

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