The nodes a cascode hands the bandwidth to

The node the bandwidth belongs to followed one common-emitter stage across five decades of source resistance and found that the Miller estimate is right about the stage only when the stage’s bandwidth lives at its input node. From 10 kΩ it was within 1%. From 10 Ω it was 3.41 times optimistic, because the input node had become fast and the bandwidth had moved to the output, where $C_\mu$ works against the load and the Miller lump cannot see it. The essay ended by naming the circuit invented to change that map: the cascode.

A cascode stacks a second transistor on the first one’s collector with its base held at a fixed voltage. The second device’s emitter presents about $1/g_m$, so the first device’s collector barely moves, its gain from base to collector is about one, and $C_\mu$ is multiplied by about two instead of by two hundred. Every textbook says so, and the frequency a device sets for itself measured why the multiplication matters. What a textbook rarely does is say where the bandwidth goes once the multiplication is removed. It has to go somewhere. A cascode has three nodes with capacitance — the input, the middle node between the two devices, and the output — and the question this essay asks is which of the three sets the bandwidth, from which source, and at what load the answer stops being the one the arrangement was built for.

The stage is the same as before: 1 mA, $C_\pi$ = 20 pF, $C_\mu$ = 2 pF, an Early voltage of 80 V, a current gain of 150, and a 5 kΩ load. The cascode adds an identical device, whose $C_\mu$ now sits from the output to its grounded base and whose $C_\pi$ sits at the middle node. Both stages are solved as netlists, and every bandwidth is bisected on the solved magnitude rather than read off a formula.

Wider everywhere, by very different amounts #

The first figure is the answer at its coarsest: the bandwidth of each stage against the source resistance driving it.

The cascode is wider from every source, and the factor runs from 1.30 to 15.9. From 100 kΩ the plain stage is down to 110 kHz and the cascode is at 1.75 MHz, the advertised result. From 10 Ω the plain stage reaches 12.1 MHz and the cascode only 15.8 MHz — barely a third more, for a second transistor and the collector–emitter voltage it takes from the supply — the cost that the source that holds to the supply measured at 0.71 V in a mirror. Drag the load to 20 kΩ and the high-source factor grows to 44.6 while the low-source factor falls to 1.11; drag it to 1 kΩ and the high-source factor is 4.1.

So the cascode’s benefit is not a property of the cascode. It is a property of the source, and it is large exactly where the previous essay found the Miller estimate accurate: where the input node was the slow one. From a low source the plain stage’s bandwidth already belonged to its output node, and removing a multiplication at the input buys nothing there. The horizontal line is the output node alone — $C_{\mu 2}$ against the 5 kΩ load in parallel with the cascode’s own output resistance — at 15.9 MHz, and the cascode’s low-source bandwidth sits on it.

The faint line is the cascode with the upper device’s $C_\pi$ left out of the middle node. At this load it is never more than one per cent above the solid one. At a 1 kΩ load the difference rises to 7.6%, because the output node is then fast enough to approach the middle one. That is the first hint of what the middle node is for, and the next figure takes the stage apart.

Four time constants, and which one moves #

A sum that is exact gives a way to see each node’s share without solving for a single pole. Remove every capacitor but one, kill the source, and measure the resistance that capacitor sees; its value times that resistance is its open-circuit time constant. The four of them sum to the first coefficient of the stage’s denominator, exactly.

Two of the four do not move at all. $C_{\mu 2}$ at the output sees the load in parallel with the cascode’s output resistance — megohms beside 5 kΩ — and holds 10.0 ns from every source. $C_{\pi 2}$ at the middle node sees roughly $1/g_m$, about 27 Ω, and holds 0.545 ns; it is never more than 5% of the sum. Neither has anything to do with the source, because nothing in the cascode carries the source’s resistance to the middle or output nodes. In the plain stage $C_\mu$ linked the output to the input, and the output node’s time constant carried a share of the source resistance across it.

The input’s two terms rise with the source, and the order between them is the thing worth reading. From 100 kΩ $C_{\pi 1}$ holds 74.7 ns and $C_{\mu 1}$ holds 15.4 ns, a ratio of 4.9. In the plain stage from the same source the ratio went the other way by a factor of 18.4, because $C_\mu$ was being multiplied by the gain. The cascode does not take the input node out of the bandwidth; it hands the input node back to $C_\pi$. From a high source the bandwidth is $r_\pi$ in parallel with the source against $C_\pi$ plus twice $C_\mu$ — 1.78 MHz by that one-line estimate, against 1.75 solved — and that is a property of the transistor rather than of the circuit around it: it is close to the device’s transit frequency divided by its current gain.

The input’s sum passes the output’s between 300 Ω and 1 kΩ. Below it the cascode’s bandwidth is its output’s; above it, its input’s. The dots are one over 2π times the solved bandwidth. They sit above the largest single term and below the sum of all four, closest to the largest term at either end and furthest from it at the crossover.

Three poles that cross instead of splitting #

The previous essay’s most striking figure was the plain stage’s two poles splitting apart as the source rose — from 92 times apart at 10 Ω to 2,993 at 100 kΩ — because $C_\mu$ couples the two nodes and the coupling is what pushes them apart. The cascode’s three poles behave differently, and the difference is the coupling’s absence.

The output node’s pole sits at 16.0 MHz from every source, on the horizontal line drawn from its own time constant. The middle node’s sits near 300 MHz — 311 MHz solved against 292 MHz from its time constant alone. The input node’s pole is the only one that moves, and it moves straight through the others: at 100 kΩ it is the lowest, at 1.77 MHz; as the source falls it rises through the output pole between 300 Ω and 1 kΩ and on past the middle one, so that at 10 Ω the lowest pole is the output’s at 15.9 MHz and the input’s has gone above the middle node’s.

Poles that pass through each other are poles that barely interact. That is the cascode’s real achievement, and it is more useful than “wider” for anyone who has to put the stage inside a loop: the non-dominant pole of a cascode is one of two fixed numbers, the output node’s or the middle node’s, and the source does not move it. The plain stage’s two poles moved apart by a factor of thirty-two as its source changed. A loop’s phase margin, as the node the bandwidth belongs to pointed out, sees that movement as a second pole that wanders when the stage before it is changed. The cascode’s does not wander.

The middle node, sized #

The middle node is the one the cascode adds, and every account of the circuit has to say whether it costs anything. Its time constant is $C_{\pi 2}$ against about $1/g_m$: at 1 mA that is 0.545 ns, a pole near 300 MHz, close to the device’s own transit frequency. It scales with the device rather than with anything the designer chooses — raising the current raises $g_m$ and lowers the middle node’s resistance in proportion, until the device’s own capacitance grows with the current too.

What it costs the bandwidth depends on how close the outer poles come to it. Into 5 kΩ the outer poles stay below 16 MHz, eighteen times lower, and leaving $C_{\pi 2}$ out of the netlist moves the solved bandwidth by less than one per cent from any source. Into 1 kΩ the output pole is near 80 MHz, a quarter of the middle one, and the omission flatters the bandwidth by 7.6%. A cascode built for speed — a low load, so that the output node is fast — is the one in which the middle node starts to count.

Where the sum of time constants is worst #

The sum of open-circuit time constants is the hand estimate of a multi-node stage’s bandwidth: one over 2π times the sum. It is exact in its first coefficient and an estimate in its bandwidth, and the gap is the subject of the fifth figure.

The estimate is never optimistic, for either stage. For the plain stage it is within 1.3% from every source — the sum includes $C_\mu$’s term at the output node, which is exactly what the Miller lump leaves out, and that is why the Miller estimate was 3.41 times wrong from 10 Ω while the time-constant sum was right. For the cascode it is 7% low from 10 Ω, 9% low from 100 kΩ, and 24% low from 300 Ω.

The worst point is where the input and output poles are closest: 1.53 times apart at 300 Ω. That is a general property of the sum, and where the estimate stops being a bound gives the arithmetic. Two equal real poles have a bandwidth of 0.644 over their time constant, and the sum predicts 0.5 over it — 22% low. A Butterworth pair is 29.3% low, the worst case that essay found for a second-order section. The cascode’s 24% is between the two, because its two lowest poles are real, nearly equal, and joined by a third far above them.

So the hand estimate has a useful reading here. A designer who sums a cascode’s time constants and finds two comparable terms should expect the true bandwidth to be up to a quarter better than the sum says. One who finds one dominant term can take the sum nearly at its word.

The load at which the Miller effect comes back #

Everything so far has been at a 5 kΩ load. The cascode’s whole mechanism rests on one number — the resistance the upper device’s emitter presents to the lower device’s collector — and that number is not $1/g_m$. Solving the upper device’s two nodes gives $(R_L + r_o)/(1 + g_m r_o)$: the emitter looks like $1/g_m$ only while the load is small beside $r_o$.

The gain from the lower device’s base to the middle node is $g_m$ times that resistance in parallel with the upper device’s $r_\pi$ and the lower one’s $r_o$, and the netlist agrees with that closed form to a part in a million at every load. It is 1.01 into 1 kΩ, which is the textbook picture. It is 12.3 into 1 MΩ and 67.0 into 10 MΩ, which is not: at a load of 125 times $r_o$, the lower device’s $C_\mu$ is being multiplied by sixty-eight again.

This matters because high loads are what a cascode is for. The device that never sees the swing measured the cascode’s output resistance at 11.5 MΩ — $\beta r_o$, not the $g_m r_o^2$ the usual expression promises — and the reason to want that resistance is to drive a load comparable to it, for gain. At exactly those loads the middle node stops being still. Above 3.11 MΩ the cascode is narrower than the plain stage: 14.7 kHz against 31.5 kHz at 10 MΩ. The plain stage’s own $r_o$ caps the resistance at its output node at 80 kΩ whatever the load, while the cascode’s lets the load set it, so the cascode’s output node and its re-multiplied $C_\mu$ both slow down together.

That is not a failure of the cascode. Its gain at 10 MΩ from the 1 kΩ source is 163,500 against the plain stage’s 2,440, and a gain that large with a bandwidth that small is a gain–bandwidth product the plain stage cannot reach. It is a failure of the sentence that says a cascode removes the Miller effect. A cascode removes the Miller effect while the load is small beside $r_o$, and it is used precisely where the load is not.

What a designer should take #

Three numbers decide a cascode’s bandwidth, and only one of them is the one a designer is told to think about. From a source above the crossover — a few hundred ohms here — the bandwidth is $r_\pi$ in parallel with the source against $C_\pi + 2C_\mu$, and the cascode buys a factor set by how badly the plain stage’s input was multiplied. Below the crossover the bandwidth is the output node’s, $C_{\mu 2}$ against the load, and the cascode buys almost nothing — 1.30 times at 5 kΩ, and the remaining cure is a lower load or a buffer. And at loads comparable to $r_o$ the middle node’s gain grows as $(R_L + r_o)/r_o$ until the upper device’s $r_\pi$ caps it, and the multiplication the cascode was built to remove has to be budgeted again.

The middle node itself can usually be ignored. It sits near the transit frequency, it never sets the bandwidth, and it moves the bandwidth by under one per cent until the output node is pushed within a factor of four of it.

How the numbers were obtained #

Each stage is a netlist of resistors, capacitors and voltage-controlled current sources — the hybrid-π model of each device — solved by modified nodal analysis. Bandwidths are found by bisecting the solved magnitude for its −3 dB point against its value at 100 Hz. Poles are recovered from the netlist’s characteristic polynomial at a rescaled frequency, so that poles three decades apart are both resolved. Each open- circuit time constant is the capacitor’s value times the resistance between its terminals, measured by driving a unit current into the netlist with every other capacitor removed and the source replaced by a short. The gain to the middle node is solved at direct current and checked against the closed form for the upper device’s emitter resistance. Nothing in the figures is read from a formula that the netlist did not also produce.

What it leaves out #

The devices are linear and fixed: $C_\pi$ does not grow with the current, as its diffusion part does, and $C_\mu$ does not fall with the collector voltage, as a depletion capacitance does. The cascode’s upper device sits at a fixed current with its base at an ideal ground; a real bias network has a resistance, and the resistor the upper base is held through found that it matters for noise at high frequency, which is where this essay’s middle pole lives; and the noise the cascode device does add found that the upper device’s base noise, unlike its collector noise, does reach the output — the same device this essay finds silent in the bandwidth. Base resistance is absent, and it sets a floor under the input node’s resistance that would move the crossover. And the collector-to-substrate capacitance of an integrated device, which would add to both the middle and the output nodes, is not modelled.

The number to keep #

Ten nanoseconds, and four times. Into 5 kΩ the cascode’s output node holds 10.0 ns from every source, so below a few hundred ohms of source no cascode makes the stage faster than 15.9 MHz; above that, the input node is $C_\pi$’s rather than $C_\mu$’s, with $C_\pi$’s time constant 4.9 times $C_\mu$’s from 100 kΩ. The removal of the multiplication holds while the load is small beside $r_o$, and above about forty times $r_o$ the cascode is the slower stage.

Still open: the base resistance, the folded cascode, and the chain #

The base resistance as a floor. The previous essay asked where $r_b$ in series with the source puts a floor under the input node’s resistance. For the cascode the question is sharper: the crossover between input and output nodes sits at a few hundred ohms, which is where a small-signal transistor’s base resistance sits too, so $r_b$ may decide on its own which node a low-source cascode belongs to.

The folded cascode. Folding the upper device into the opposite polarity puts a current source on the middle node, whose output resistance and capacitance add to the middle node’s. Whether the middle pole stays near the transit frequency once a second device’s collector hangs on it is the measurement that would say whether this essay’s “ignore the middle node” survives the arrangement most integrated amplifiers use.

The chain. A two-stage amplifier drives its second stage from its first stage’s output, so the second stage’s source resistance is the first stage’s output resistance — and for a cascode first stage that is megohms. The second stage would then sit at the far high-source end of every figure here, where the cascode’s advantage is largest; whether a designer should put the cascode in the second stage rather than the first is the question a chain would answer.