Integrator — where it appears
Named by 6 essays across 4 fields — each of them below, with the objects they name alongside it.
The shelf a capacitor makes
An inverting amplifier's summing node rises a decade per decade to the two resistors in parallel. Replace the feedback resistor with a capacitor and it does neither: an integrator's loop gain has no frequency in it, so the node is flat at Rin/(1 + 2π·GBW·C·Rin) — 15.67 ohms over four decades, to half a per cent. Both ends invert. At direct current the capacitor is an open circuit, there is no loop at all, and the node is 843 ohms against the resistor's tenth of one; above the amplifier's crossover the capacitor is a short and the node is nineteen times better.
The sensor an integrator does not see
A sensor's capacitance at an inverting stage's summing junction sits across a node that rises like an inductance, and makes a resonance: 10 nF lifts the node 2.50-fold at 39.8 kHz, the lift is the resonance's Q, and the loop's margin falls from 90° to 24.8°, and to 8.0° at 100 nF. The same capacitance at an integrator's node sits across a resistance — the shelf, 1/(2π·GBW·Cf) — and the shelf does not move, because the capacitance enters the open node and the loop gain together and cancels. With an ideal output the integrator's margin is 90.91° at every sensor from 1 pF to 100 nF. What it does see is its amplifier's output resistance: 50 Ω driving the feedback and sensor capacitors in series is a pole, worst when the two are equal, 58.3° at 10 nF, and it recovers on both sides.
The resistor that holds the bottom of the shelf
An integrator's summing junction sits on a flat shelf, 1/(2π·GBW·Cf), over its working band, and at direct current it is nearly its whole input resistor, because a capacitor closes no loop there. A resistor across the capacitor closes one. Below the feedback's own corner the node is then an inverting stage's, rising a decade per decade from Rp/A₀, and the rise meets the shelf exactly at that corner, 1/(2π·Rp·Cf), for any resistor and any amplifier — so the node never rises above its shelf at all. That holds for every resistor below 1/(2π·f₁·Cf), the one that puts the feedback's corner on the amplifier's own pole: 1.59 MΩ here. Above it the bottom climbs past the shelf. The same 1.59 MΩ is where a millivolt of offset becomes 1.58 V at the output, and the price below it is a flat gain of Rp/Rin and arctan(1/(2π·f·Rp·Cf)) of phase.
The average an integrator can hold
A switched-capacitor integrator is an averager whose samples are exactly independent, because every cycle resets the sampling capacitor — and it pays for that with two switch phases, 2kT/Cs a cycle, 89.5 µV rms with a picofarad. An ideal integrator averages that as 1/√N without end. A real one leaks through its amplifier's finite gain, and the leak caps the average at 2A·Cf/Cs cycles: 8,000 for a gain of a thousand and a 4 pF feedback capacitor, where the noise stops at √(kT/(A·Cf)) = 1.00 µV. That floor contains the feedback capacitor and the gain and not the sampling capacitor at all, which decides only how long the integration takes to reach it.
The current a capacitor adds up
An amplifier's input current in a resistor is an offset; in a capacitor it is a rate, and time is the gain. An integrator of 100 kΩ and 1 µF with its input grounded ramps at 50.0 mV/s from 50 nA, and balancing the inputs leaves the 5.00 mV/s of the offset current, still unbounded. A leak resistor bounds it at the current times the leak and costs the lowest frequency the circuit integrates. A hold capacitor's droop times its acquisition time is fixed, so 50 nA through a 100 Ω switch needs 655 nF and 0.77 ms for half a 16-bit step. A charge amplifier's offset times its low corner is Ib/2πCf, whatever its bleed.
The integrator that leaks the zero away
A noise-shaping loop puts its error's zero at zero frequency because its integrators never forget. An integrator built round an amplifier of gain A forgets a part in A every sample, and the zero moves off zero frequency to a floor. The cost is a function of one number, the oversampling ratio over π times the gain: for two leaky integrators it is 10 log(1 + (10/3)x² + 5x⁴), which the marched loops follow to within two decibels from gains of 10 to 300, and keeping it under a decibel needs a gain of 1.2 times the oversampling ratio. A first-order loop pays a second way: inputs within exactly 1/(2A − 1) of zero leave its output where it was.
Named alongside it
The objects these essays reach for when they reach for this one.
Loop gainSumming junctionClosed-loop responseDesign tradeoffLoadingOffset voltageAveragingCharge amplifierClosed formCorner frequencyDynamic rangeIdle tones