Concept

Phase margin — where it appears

How much phase is left before minus 180 degrees where a loop's gain passes unity, and the usual single number for how near to oscillating it is. It is comfortable across a range of compensation values that differ by twenty-seven times in settling time, so it cannot be used to choose between them.

Named by 39 essays across 5 fields — each of them below, with the objects they name alongside it.

Loop gain of a three-pole amplifier closed for a gain of 100. Unity loop gain at 5.73 kHz, where 34.9° of phase remains before −180°. The phase reaches −180° at 89.6 kHz, where the loop gain is 46.1 dB below unity.

What is left at crossover

A feedback loop is stable or not according to one number read at one frequency — how much phase remains before −180° at the point where the loop gain passes unity. The loop gain here is obtained the way it is obtained on a bench: cut the loop, drive one side of the cut, and measure what comes back to the other.

feedback · Loop gain
One loop, two measurements of the same margin. The loop gain crosses unity at 5.73 kHz with 34.9° of phase left. The closed-loop step overshoots by 35.2%, which the second-order relation says corresponds to 34.8°. They differ by 0.1°, and the difference is the third pole.

Two measurements of one margin

A phase margin is computed from the loop gain in the frequency domain, without ever looking at a step. An overshoot is measured from the closed-loop step response in the time domain, without ever looking at a Bode plot. Inverting the standard relation on the second returns 34.9° against the first's 34.9°, and the residue is the third pole.

feedback · Margin overshoot
A loop whose phase comes back, at a gain of 1.0e+7. computed by solving, not by drawing. Three identical poles take the phase to −270°, two lead sections bring it back to −158°, and their own poles take it down again — so ∠L = −180° at 189 Hz, 3.46 kHz and 23.5 kHz. The gain moves the magnitude curve and not those three frequencies, so it decides only which side of each the unity-gain point falls. At 1.00e+7 the crossover is 10.6 kHz, in the recovered band, and the loop is stable.

Stable, and unstable with less gain

A three-pole loop with two lead sections is stable for gains between 1.81 × 10⁶ and 3.36 × 10⁷ and unstable on both sides of that window. Turning its gain *down* is what breaks it. Neither margin can see this, because a phase margin describes the loop at one frequency and a gain margin at one other, and this loop's phase crosses −180° at three: 189 Hz, 3.46 kHz and 23.5 kHz.

feedback · Loop gain
How much of the amplifier reaches the answer, at 35° of phase margin. computed by solving, not by drawing by multiplying the forward path's gain by 1 + 10⁻⁵ and solving again. At low frequency 0.0999% of a fractional change in the device reaches the closed-loop gain, which is one over the loop gain of 995.04. It changes sign at 258 Hz — above there a better amplifier gives a smaller gain — and reaches 1.61 at 8.08 kHz, which is worse than having no feedback, and settles at exactly 1 above crossover (5.73 kHz), where there is no loop gain left to spend. The second route, the real part of 1/(1 + T) from the cut loop, agrees to 9.6e-6.

How much of the amplifier gets through

The reason to build an amplifier from a bad amplifier and two resistors is that a change in the device barely reaches the answer — a tenth of a per cent of it at low frequency, measured by making the device better and solving again. Near crossover the same fraction rises above one, so feedback makes the gain more device-dependent than no feedback at all, and below fifty degrees of margin it changes sign on the way.

feedback · Desensitivity
An inverting unity gain, and the 100 pF that only the loop can see. computed by solving, not by drawing. Two ten-kilohm resistors around a 10 MHz amplifier make a gain of 1.00, and a loop that closes against 2.01 — one plus the ratio, not the ratio. Adding 100 pF at the summing junction leaves the closed-loop gain at a kilohertz unchanged — 0.99998051 against 0.99997988, three parts in a million at the far end of the slider — and takes the phase margin from 90.0° to 14.4°, because the noise gain now rises a decade per decade and the loop closes at forty decibels per decade instead of twenty. Forty-five degrees is reached at 9.00 pF, bisected on the netlist. The capacitance is not part of the signal path and does not appear in any expression for the gain.

The gain the loop closes against

An inverting amplifier with two equal resistors has a gain of one and a loop that closes against two, so it has half the bandwidth of a follower built from the same part — 4.99 megahertz against ten. Nine picofarads at the summing junction, less than a scope probe, takes the phase margin from ninety degrees to forty-five, and a hundred picofarads puts twelve decibels of peaking on a response whose designed gain is nought decibels and whose measured gain at a kilohertz has not moved by three parts in a million.

feedback · Noise gain
The window a 10 µF capacitor leaves. Above 939 mΩ the loop holds 45° of margin; below it the regulator rings and then oscillates. The droop after a 100 mA step is smallest at 817 mΩ — 129 mV — and by 19.9 Ω it is 1.468 V, because at the first instant of a step the capacitor cannot move and the whole step falls across its series resistance. Two requirements, opposite directions, and the useful values are between them.

Two requirements pulling one capacitor

The output capacitor's series resistance is a stability requirement and a transient requirement at once, and they pull it in opposite directions. Below 939 milliohms this loop has less than 45 degrees of margin; above about 850 the droop after a load step starts to grow, because at the first instant of a step the capacitor cannot move and the whole step falls across that resistance. The droop is smallest 10 per cent inside the unstable region, which means the best transient this design can have is one it must not be built with.

applied · Regulator
An inverting unity gain driving 2.2 nF, and the pole that is inside the loop. computed by solving, not by drawing. Two ten-kilohm resistors around a 10 MHz amplifier make a gain of 1.00, and a loop that closes against 2.01 — one plus the ratio, not the ratio. Hanging 2.2 nF on the output leaves the closed-loop gain at a kilohertz unchanged — 0.99998002 against 0.99997988 — and takes the phase margin from 90.0° to 30.1°. The mechanism is at the other end of the amplifier from the summing-junction case and the arithmetic is the same: the load works against the amplifier's own fifty ohms of output resistance, which puts a second pole in the forward path — inside the loop, where the feedback has to live with it — while the gain the loop closes against does not move at all. Forty-five degrees is reached at 905 pF, bisected on the netlist. The capacitance is not part of the signal path and does not appear in any expression for the gain.

The load that gets inside the loop

Hanging a capacitor on an amplifier's output changes nothing a reader can find in any expression for its gain, and takes the phase margin of a unity-gain inverter from ninety degrees to thirty. The mechanism is fifty ohms of output resistance that no data sheet page puts next to the stability page: the load works against it, the pole that results is in the forward path, and forty-five degrees arrives at 905 picofarads — which is a metre of coaxial cable.

feedback · Capacitive load
9.9 Ω restores 45°, 23 Ω restores 60°, and the load pays for it in ohms. computed by solving, not by drawing. Phase margin against the resistor placed between a unity-gain inverter's output and 2.2 nF of load capacitance, with the feedback taken from the amplifier's own side of it. With no resistor the margin is 30.11°; 9.90 Ω restores 45° and 23.20 Ω restores 60°. The lower curve is the same resistor with the feedback taken from the load instead, where it makes every value worse — the pole is then inside the loop rather than outside it, and at 220 Ω the margin is 13.4°. The rising curve is what it costs: the loop no longer regulates the load's node, so 1 kΩ of resistive load pulls the output down by 0.990% at 10 Ω, uncorrected, at direct current.

The resistor that buys the margin back

Two point two nanofarads takes a unity-gain inverter's phase margin from ninety degrees to thirty. Ten ohms between the amplifier and the load restores forty-five, twenty-three restores sixty, and it works for a reason that reads as a cheat: the feedback is taken from the wrong side of the resistor, so its pole is outside the loop. Take the feedback from the load instead — which is what anyone controlling the load would do — and the same resistor makes every value worse. What it costs is that the loop no longer regulates the load's node at all: ten ohms is one per cent of error into a kilohm, at direct current, uncorrected.

feedback · Capacitive load
The second path costs nothing at 12 pF and an order at 100 pF. computed by solving, not by drawing. Settling time to 0.01% of final value, marched on the closed loop, against the value of the second feedback path's capacitor — with the phase margin of the same circuit divided by ten drawn on the same axis so the two can be compared. The direct-current error the previous rung recorded as the isolation resistor's cost, 0.99% into 1 kΩ, falls to 1.20e-4% with the second path in. What the second path costs instead is a range: at 12 pF the circuit settles in 0.745 µs against the isolation resistor's 1.419 µs — faster than the thing it repairs — and at 100 pF it takes 9.18 µs, 12 times longer, at a phase margin of 47.9° that reports nothing whatever about it. What it is settling by there is one exponential of time constant 0.99 µs, which is the feedback network's own RC and contains no amplifier.

The path that buys the error back

An isolation resistor restores a capacitively loaded amplifier's phase margin and costs it the thing feedback was for: the loop stops regulating the node the load is on, and a kilohm of load pulls the output down by a per cent. The standard repair is a second feedback path, and its cost is not an error or a margin — it is a range. At twelve picofarads it settles to a hundredth of a per cent in 0.745 microseconds, faster than the circuit it repairs; at a hundred it takes 9.18, and the phase margin there is better.

feedback · Capacitive load
The quietest capacitor is 18× the fastest one, and the margin prefers neither. computed by solving, not by drawing. The total noise at the load of a capacitively loaded stage against its compensation capacitor, with the settling time on the same axis at ten microseconds to the microvolt. Three independent sources are put in the netlist and solved separately — the amplifier's own 4 nV/√Hz at its input, and √(4kTR) in series with each of the two feedback resistors — and added in power. The noise falls monotonically with the capacitor, from 50.7 µV at 1 pF to 12.1 µV at 220 pF. The peak in the noise gain falls with every larger capacitor and is gone entirely from 12 pF upward, where the uncompensated stage's peaks at 3.85 times its own low-frequency value. What the capacitor costs is settling: the fastest is 12 pF at 0.74 µs — the same capacitor that flattens the noise gain, because one handover decides both — and the quietest takes 20.3 µs, at a margin above 40° everywhere in that range.

What the second path costs at the floor

The arrangement that repaired a capacitively loaded amplifier was suspected of paying for itself in noise, because that is how compensations usually pay. It does not: it has no peak in its noise gain at all, and the total at the load falls from 54.9 microvolts to 28.9 as the capacitor is added. What it costs is settling, and the capacitor that is quietest is eighteen times the capacitor that settles fastest — a trade the phase margin says nothing about, because the margin is comfortable at both.

feedback · Capacitive load
A photodiode's own capacitance sets the bandwidth, as its -0.50 power. computed by solving, not by drawing. The bandwidth of a 1.0 MΩ transimpedance stage against the capacitance of the diode driving it, with the feedback capacitor at each point bisected to give exactly forty-five degrees of phase margin on the solved loop. The classical expression √(GBW/2π·rf·cd) is drawn over it: the right shape, and conservative by about a fifth at every capacitance. The bandwidth falls as the -0.497 power of the capacitance — a square-root law, so a diode of four times the area costs half the bandwidth rather than three quarters of it. At 30 pF the compensation is 0.598 pF against the expression's 0.725, and the bandwidth 295 kHz against 220.

Where the trouble is at the input

Every other arrangement in this field has its difficulty at the output — a capacitive load, an isolation resistor, a load that draws current. A photodiode amplifier has it at the input, and the capacitance causing it is not a parasitic: it is the diode's junction, which is the price of its area, and area is what a photodiode is bought for. The feedback resistor's own noise is 127 nV/√Hz against the amplifier's 4, and the amplifier is still ninety-five per cent of the noise at a large diode.

feedback · Transimpedance
40.0 dB of gain change and 180.0 degree-decades of phase, peaking at 109.8°. computed by solving, not by drawing. The gain and the phase of two leads of 10:1, together, each section buffered from the next. The gain changes by 40.000 dB from one end of the sweep to the other. The area under the phase, integrated on the solve over seven decades beyond the outermost corner, is 180.000 degree-decades, against 180.000 for ninety per twenty decibels of gain change. The peak is 109.806° at 3.16 kHz, below the 131.93° no arrangement of real leads sharing that rise can pass.

The phase a decibel buys

The area under a minimum-phase network's phase, counted in degrees across decades of frequency, is fixed by how far its gain moves from one end of the spectrum to the other: ninety degree-decades for every twenty decibels, however the network is arranged. One 100:1 lead peaks at 78.579 degrees and two 10:1 leads stacked together at 109.806, and both enclose 180.000. The peak is a design decision and the area is a bill — and a network that gives its gain back gives its phase back with it.

frequency · Minimum-phase
The straight lines report 45.00° of margin, and the solved loop has 51.83°. computed by solving, not by drawing. The gain and phase of a loop made of an integrator and one pole, the corner at 1.00 kHz, with the integrator set so that the straight-line asymptotes cross unity at 1.00 kHz. The solved loop crosses at 786 Hz instead. Read at the lines' crossover, with the phase taken from the solve, the margin is 45.00°; at the loop's own crossover it is 51.83°. Closed, the loop is stable: the largest real part among its closed-loop poles is -5.00e-1 of the corner's angular frequency. The solved gain never rises above its asymptotes, so the lines cannot report more margin than the loop has.

The margin the straight lines report

A phase margin read off a sketch is read where the straight lines cross unity, and that is not where the loop does. For an integrator and one real pole the lines report 45.00 degrees on a loop that has 51.83 — short, and always short, because a real pole's response never rises above its asymptotes. A pair that peaks reverses the sign and removes the bound: at a quality factor of two the lines report 71.57 degrees on a loop that has no margin at all, and at five they report 82.41 on a loop that is unstable.

frequency · Asymptotic approximation
The capacitor across the upper resistor: 90.9° of margin at 836.5 pF, and less ripple past it. The regulator's phase margin against a capacitor across the upper divider resistor, with the output ripple the 1000 µF reservoir leaves beside it. With no capacitor the margin is 46.47° at a crossover of 9.73 kHz, the output impedance at 10 kHz is 1.95 Ω, the worst rail rejection is 5.79 dB and the ripple 60.62 mV. The margin is greatest, 90.929°, at 836.5 pF — a zero at 6.34 kHz and a pole at 25.4 kHz around a crossover moved to 16.9 kHz — where the output impedance at 10 kHz is 828 mΩ, the worst rail rejection -1.50 dB and the ripple 52.33 mV. At 10 nF the margin has fallen back to 66.34° and the ripple is 35.40 mV.

The capacitor across the upper resistor

The rejection essay said a regulator reproduces its reference times its divider's four, and that a capacitor across the lower divider resistor brings that down to one at high frequency. Measured, the loop peaks the reference's gain to 5.68 near its crossover before any capacitor is added; a nanofarad across the lower resistor raises the peak to 11.2; and the capacitor that brings it down belongs across the upper resistor, where a nanofarad keeps the gain from ever exceeding four. The same capacitor is a lead pair in the loop: 836.5 picofarads takes the phase margin from 46.5 to 90.9 degrees, and ten nanofarads, past that optimum, still holds 66 while cutting the output ripple from 60.6 millivolts to 35.4.

applied · Regulator
The cure changes shape at 909 Ω, which is a property of the feedback network and of nothing else. computed by solving, not by drawing. What balancing actually does to the circuit, against the source resistance it is done for, at a gain of 11 with a 1.0 kΩ bottom resistor. The inverting input looks back into 909 Ω — the bottom resistor times (G−1)/G — and that number is the whole of the knee. Below it the cure is a resistor in series with the source and the feedback network is untouched. Above it there is no resistor to add, and the network is scaled up to meet the source instead: 1100× at 1.0 MΩ, which puts 11 MΩ in the feedback path. The scaled feedback resistor is the source resistance times the gain exactly, so the network's own size has left the answer — it decided where the knee was and nothing after it.

The cure that becomes a different circuit

The classical cure for an amplifier's input current is to make the two resistances its inputs look back into equal, and it reads as one instruction. Solved, it is two circuits meeting at 909 ohms — the feedback network's bottom resistor times (G−1)/G — and above that knee there is no resistor to add: the network is scaled to the source, which at a megohm means 11 megohms of feedback and at a gain of 1001 means 1001. Above the knee three different networks become one instrument to twelve figures, the noise penalty settles at 1.41420 against a √2 of 1.41421, and the benefit at 10.49 against two currents whose ratio is ten.

instruments · Input bias current
One capacitor moves three quantities, and the expression's own answer peaks by 1.18 dB. computed by solving, not by drawing. The bandwidth, the peaking and the total output noise of a 1.0 MΩ transimpedance stage against its feedback capacitor, swept from 0.30 to 4.20 times what the classical expression asks for. Over that factor of fourteen the bandwidth falls from 334 to 55.4 kHz, the total noise from 230 to 65 µV, and the peaking from 10.0 dB to nothing. The expression's own answer sits at 1.18 dB of peaking, 0.82× is where the loop reaches forty-five degrees, and √2× is where the response is flat — so the choice usually quoted as maximally flat is neither of the two conditions it is quoted for. The faint families are the same three quantities at 3 pF and 300 pF of diode: normalised this way they are one curve, so the diode sets the scale and the multiple sets the shape.

The factor the expression leaves out

The classical compensation for a photodiode amplifier is quoted both as the forty-five degree choice and as the maximally flat one, and it is neither: it leaves 1.18 dB of peaking and 52.4° of margin. Flat is at exactly √2 times it — fitted at 1.4186 against 1.4142, at every detector from 3 pF to 1 nF. And the third quantity the capacitor is supposed to trade, the noise, does not move at all inside the signal band: three compensations spanning a factor of fourteen give 8.37 against 8.36 µV in a 4.36 kHz measurement and 230 against 65 µV over the whole plane.

feedback · Transimpedance
A capacitor across the upper divider resistor removes the output capacitor's resistance floor. computed by solving, not by drawing. Two series resistances against the capacitance across the upper divider resistor: the smallest the loop tolerates at 45° of margin (lower curve), and the one that gives the smallest droop after a 100 mA load step (upper). With no capacitor they are 939 mΩ and 885 mΩ — the second BELOW the first, which is the conflict this design has: the best transient is one the loop refuses. The floor falls as the capacitor grows and between 500 and 836.5 pF it leaves the sweep altogether, so every series resistance down to a milliohm is stable. Past about 5000 pF the floor climbs back and overtakes the optimum again. The shaded band is where the design a transient wants is one the loop allows.

The floor a second capacitor removes

Two requirements pulling one capacitor found a regulator whose best transient is one it must not be built with: below 939 milliohms of output-capacitor series resistance the loop has under 45 degrees of margin, and the droop is smallest at 885. The capacitor across the upper divider resistor, added for the reference's sake, dissolves that conflict. At 836.5 picofarads the 45-degree floor leaves the sweep entirely — every series resistance down to a milliohm is stable — and the droop falls 40 per cent at the same time. The band of capacitances that do it runs from 100 picofarads to 5 nanofarads, and above it the conflict returns.

applied · Regulator
Loop gain of a two-pole amplifier closed for a gain of 100. Unity loop gain at 5.73 kHz, where 35.0° of phase remains before −180°. The phase never reaches −180° at any frequency, so there is no gain margin to quote: 2 poles contribute at most 180° and the last of it arrives only at infinity.

The loop that never crosses

Every loop this field draws carries two margins, and one of them is not always a number. Take the third pole out of the standard loop and its crossover moves by 2.45 parts per million and its phase margin by 0.164 degrees — the third pole's own arctangent there, to five decimal places — while its gain margin goes from 46.06 decibels to no number at all. The phase reaches −180° only where the magnitude has already reached −62 decibels, and the two instruments that are supposed to notice report 3.19 × 10⁻⁶ either way.

feedback · Loop gain
The straight lines report 6.02 dB of gain margin on a loop that has none. computed by solving, not by drawing. The gain and phase of a loop made of an integrator and a pair at Q = 2, the corner at 1.00 kHz, the integrator set so that the straight-line asymptotes cross unity at 500 Hz. The loop's phase passes −180° at 1.00 kHz. There the lines put the loop gain at −6.02 dB and the solve at 0.00 dB, so the gain margin they report is 6.02 dB against 0.00 dB. The difference is 6.0206 dB, which is 20 log Q exactly with Q = 2, at any integrator gain. Closed, the loop is on the edge: the largest real part among its poles is -5.87e-17 of the corner's angular frequency.

The gain margin the straight lines get exactly wrong

A phase margin read off the straight lines is wrong by an amount that depends on where the loop crosses unity. A gain margin read off them is not: for an integrator and a pole pair the phase passes −180° at the pair's own frequency whatever the gain, and the lines are out there by exactly 20 log Q — 6.0206 dB for two real poles, 13.98 dB at a quality factor of five, at every integrator gain drawn. The stability condition for the loop turns out to be the same inequality: it is stable exactly when the gain margin the lines report exceeds that error.

frequency · Asymptotic approximation
What a feedback tee buys, and the single thing it charges. computed by solving, not by drawing. Two 50 kΩ resistors with a 6.250 kΩ tap give 500.0 kΩ of transimpedance, which is R₁(1 + R₂/R₃) + R₂ solved on the netlist. That expression has no term for the noise gain, and the tap sets it to 1 + R₁/R₃ = ×9.00 — against exactly one for a single resistor of any value, because at direct current the source is a capacitor. One quantity then does all three things at once. The signal and R₁'s own noise are multiplied together, so the tee buys no signal-to-noise ratio at all: 1846 against 5582 in a hertz at a nanoamp for one resistor of the same transimpedance, a factor of 3.02 which is the square root of the noise gain. The amplifier's own voltage noise and offset are multiplied where they were not before. And the phase margin RISES, from 1.8° to 15.9°, because starting the noise gain high shortens its climb to the peak — so the tee is a compensation that charges for itself in noise, and a capacitor across the feedback is the same compensation for nothing. With no tap the three effects are absent rather than small.

The tee that charges for its own compensation

A feedback tee makes a large transimpedance out of small resistors, and R₁(1 + R₂/R₃) + R₂ is the whole of what is usually said about it. The expression has no term for the noise gain, and the tap sets that to 1 + R₁/R₃ — nine, where a single feedback resistor of any value gives exactly one, because at direct current the source is a capacitor. One quantity then does everything: the signal and R₁'s own noise are multiplied together so the tee buys no signal-to-noise ratio at all, and the phase margin RISES from 1.8° to 15.9°.

feedback · Transimpedance
Lead zero at 500 Hz: the lines over-report by at most 3.12° with the loop's phase, and short by up to 20.6°. computed by solving, not by drawing. The error in the phase margin read off the straight lines of an integrator, two poles at 1.00 kHz and a lead section with its zero at 500 Hz and its pole 10 times higher, against where the lines cross unity, measured in decades from the zero. Gaps are placements where the lines are flat at unity or the loop crosses more than once. Read with the loop's own phase the reading is over by at most +3.12°, with the lines crossing −0.01 decades from the zero on a loop with 73.4° of margin, and never over on any loop with 60° or less; it is short by as much as 20.65°. Read with the phase off its straight lines too, on loops with 60° or less, it is never over.

The zero that lifts the lines

A phase margin read off the straight lines of an all-pole loop can only be short, and the proof takes three steps. A lead section breaks two of them: a zero's response lies above its lines, and between a zero and its pole the phase rises. The two breaks pull opposite ways, and measured across every placement of the crossing, in every sweep drawn, they leave an over-report of at most 6.58°, on a loop with 87.5°; on loops with sixty degrees or less it never exceeds 1.52°. The phase sketch is another matter: with the lines crossing at a lead zero above the plant's corner, it reports 17.91° on a loop with 1.17°.

frequency · Asymptotic approximation
A summing junction with a second pole above it: 3.1 dB of peak, and inductive. computed by solving, not by drawing on a two-pole amplifier — a gain block, two sections and a buffer, so the feedback network loads the output exactly as it does with one pole. The faint curve is the one-pole case, which rises to 909.1 Ω and stops. With a second pole at 100 kHz the junction reaches 1304 Ω at 112 kHz — 3.13 dB above the two resistors in parallel — because the division is by |1 + T| and near crossover that is smaller than one. A third of a decade below the peak the node's impedance leads its current by 84.4°, which is an inductance: the node is no longer a resistance that a capacitance loads, it is a reactance that a capacitance resonates with. The slider puts capacitance on the node and moves the peak.

The node that is an inductance

A summing junction with a one-pole amplifier round it rises to the two feedback resistors in parallel and stops there, and that ceiling is the whole of what a virtual earth can be. Give the amplifier a second pole and the node overshoots it — 1074 ohms against 909 with the second pole at 300 kilohertz, 1868 with it at thirty — and below the peak the impedance leads its current by more than twenty degrees, which is an inductance. So a stray capacitance on the node is no longer a load on a resistance; it is a resonance, and the peak grows with it rather than being damped by it.

feedback · Virtual earth
Losing capacitance to bias raises this loop's margin; the corner that binds is the ceramic at full value. computed by solving, not by drawing. Phase margin of the five-volt regulator with a 5.00 mΩ ceramic output capacitor, against the capacitance that capacitor keeps at the working voltage, from the full 10 µF down to 1.5 µF, for five capacitors across the upper divider resistor. With none, the margin climbs from 18.0° at full value to 43.6° at 15% kept, so the lost capacitance is stabilising rather than the reverse. 630 pF holds at least 49.7° across the whole range. 836.5 pF, the value that removed the resistance floor at the nominal capacitance, gives 48.8° at full value and 44.3° at 15%: the capacitor that has lost the most is the one it fails on.

The capacitance the bias takes away

A ceramic output capacitor has a few milliohms of series resistance, which a capacitor across the upper divider resistor made legal, and a capacitance that falls with the voltage across it — a ten-microfarad part at five volts is two microfarads to a small signal. Swept from the full ten down to that fifth, the regulator's margin does not collapse. It rises: with no divider capacitor from 18.0° to 38.5°, because the output pole climbs away from the amplifier's. The corner that binds is the capacitor at full value. One divider capacitor, 423 to 808 pF, holds 45° at every capacitance between. The 836.5 pF that removed the resistance floor sits just above that band, and the lost capacitance is paid for in droop: 103 mV at full value, 202 mV at a fifth.

applied · Regulator
At 50° of margin a capacitor across the resistor carries 85.2 µV and a tee 347 µV: the tee is dominated everywhere. computed by solving, not by drawing. A photodiode amplifier of 500 kΩ transimpedance on 33 pF of detector, behind a 10 MHz amplifier with 4 nV/√Hz of voltage noise, compensated either by a capacitor across a single feedback resistor, swept from none to 4 pF, or by a tee of the same transimpedance and factor 3 to 64. Each design's phase margin is drawn against its output noise integrated to its own bandwidth. At every margin a tee reaches, the capacitor reaches it with less noise: at 50.4° the capacitor's design (0.97 pF) carries 85.2 µV in 396 kHz and the tee (factor 32) 347 µV in 401 kHz, 4.1 times more. The ratio runs from 1.29 to 7.47 across the margins compared.

The compensation that costs nothing

A photodiode amplifier can be compensated with a capacitor across its feedback resistor, or with a feedback tee, whose raised noise gain also raises the phase margin. At one transimpedance, 500 kΩ on 33 pF of detector, each design's margin is drawn against its output noise over its own bandwidth. The capacitor dominates at every margin the tee can reach: at 50° it carries 85 µV where the tee carries 347, in the same 400 kHz. The two keep the same band to within 1.3 per cent at equal margin, so the tee's noise buys no bandwidth. The conjecture that the answer would turn on which noise dominates does not survive either. With the amplifier's voltage noise cut tenfold, the tee is still 5.6 times worse.

feedback · Transimpedance
1 nF at the node lifts the inverting stage's virtual earth 1.28-fold at its resonance, the integrator's 1.09-fold. computed by solving, not by drawing. The impedance looking into the summing junction of an inverting stage (1 kΩ in, 10 kΩ feedback) and an integrator (1 kΩ in, 10 nF feedback) on the same 1 MHz amplifier, bare (dashed) and with 1 nF of sensor capacitance from the node to ground (solid). The inverting stage's node rises as an inductance, and a capacitance across an inductance is a resonance: its node reaches 909 Ω at 126 kHz, 1.28 times the bare node there. The integrator's node is a resistance, the shelf of 15.9 Ω, and a capacitance across a resistance is a corner: the loaded node is at most 1.086 times the bare one, and only where the amplifier's own output resistance is part of the loop.

The sensor an integrator does not see

A sensor's capacitance at an inverting stage's summing junction sits across a node that rises like an inductance, and makes a resonance: 10 nF lifts the node 2.50-fold at 39.8 kHz, the lift is the resonance's Q, and the loop's margin falls from 90° to 24.8°, and to 8.0° at 100 nF. The same capacitance at an integrator's node sits across a resistance — the shelf, 1/(2π·GBW·Cf) — and the shelf does not move, because the capacitance enters the open node and the loop gain together and cancels. With an ideal output the integrator's margin is 90.91° at every sensor from 1 pF to 100 nF. What it does see is its amplifier's output resistance: 50 Ω driving the feedback and sensor capacitors in series is a pole, worst when the two are equal, 58.3° at 10 nF, and it recovers on both sides.

feedback · Virtual earth
At full capacitance the margin falls with the load, and below a tenth of an ampere no divider capacitor gets it past 36.9°. computed by solving, not by drawing. Phase margin of the five-volt regulator with a 5 mΩ ceramic keeping 10 µF, against the load current from 5 mA to 1 A, for four capacitors across the upper divider resistor. 630 pF, which held 45° at every capacitance at an ampere, gives 49.7° at 1 A and 36.0° at 5 mA. With no capacitor the margin at 5 mA is 0.1°. The dotted level is 36.87°, the most phase a zero and a pole four times apart can ever lead by, and every curve ends under it. The crossover stays between 12.9 kHz and 13.2 kHz over the whole range.

The lead a divider can give

At an ampere one capacitor across the upper divider resistor holds this ceramic regulator above 45° at every capacitance the part keeps. At 5 mA nothing does. The crossover stays at 13 kHz while the output pole falls from 3.20 kHz to 31.8 Hz, so the loop arrives at unity with every lag it has and the only phase left is the lead the divider capacitor makes — and that lead has a ceiling, arcsin((G − 1)/(G + 1)), set by the divider's ratio alone. For a five-volt output from a 1.25 V reference it is 36.87°, and the best capacitor reaches 36.83°. Over the rectangle from 5 mA to an ampere and ten microfarads to two, the best single capacitor gives 32.4°. Putting 416 mΩ back in series with the ceramic restores 45° over all of it, and lowers the droop rather than raising it.

applied · Regulator
With the crossover at 10% of the clock the straight line overshoots 13.7%, the hold with its pole 32.8%. computed by solving, not by drawing, marched at 160 steps a clock. A unit step through a loop whose plant is an integrator crossing over at 10% of the sample rate, reconstructed three ways: held (dotted), joined by straight lines (solid), and held then passed through the analogue pole that attenuates the nearest image, at 90% of the clock, exactly as much as the straight line's second sinc does (dashed) — a pole at 9.90% of the clock, at the crossover itself. Overshoot: 0.0%, 13.7% and 32.8%. The straight line buys the same image rejection for half a clock of delay; the pole buys it for forty-five degrees.

Half a clock against a pole

Inside a digitally controlled loop a converter's delay is phase at the crossover, and a straight-line output pays one more half clock than a hold: 180 degrees times the crossover over the clock. The analogue pole that rejects the nearest image as much as the straight line's second sinc does turns out to sit at the crossover itself — 0.990 of it when the loop crosses over at a tenth of its clock, sinc(r) of it in general — so it costs forty-five degrees however slow the loop is. By the phase estimate the half clock is the cheaper filter below 26% of the clock. Marched as a sampled loop the answer is 17.6%, and at a tenth of the clock a step overshoots 13.7% through the straight line against 32.8% through the hold and its pole, for the same image rejection measured on both waveforms.

digital · Reconstruction
The gain's sensitivity to the device and to the divider add to one at every frequency, and at crossover each is exactly one half (34.9° of margin). computed by solving, not by drawing, three times at each of 241 frequencies: nominal, with the amplifier's gain raised by one part in 10⁵, and with the feedback fraction raised by one part in 10⁵. The fraction of the device's change reaching the closed-loop magnitude is 9.97 × 10⁻⁴ at 10.0 Hz and 1.60 at its peak near 7.94 kHz; the fraction of the divider's change is 0.99899 at 10.0 Hz and falls to −0.60 at 7.94 kHz. They add to one within 1.16 × 10⁻⁵ everywhere, and at the loop's crossover, 5.73 kHz, they are 0.5000 and 0.5000: the real parts of 1/(1 + T) and T/(1 + T), which are one half at |T| = 1 for any phase. The cut loop, a second route, agrees to 9.55 × 10⁻⁶.

Half to the amplifier, half to the resistors

A feedback amplifier is supposed to hand its accuracy to the resistors, and at low frequency it does — 99.9 per cent of a change in the divider reaches the gain and 0.1 per cent of a change in the device. The two fractions are measured here by nudging each and solving again, and they add to one at every frequency, to five parts in a hundred thousand. At the loop's crossover each is exactly one half, whatever the margin: the gain's magnitude answers the amplifier and the resistors equally. As complex numbers both are 1/(2 sin(φ/2)) there, above one for any margin under sixty degrees, and around the crossover lies a band where the gain is more sensitive to both than it would be with no feedback at all.

feedback · Desensitivity
On a linear frequency axis the loop's desensitisation is an area, and the area it gives back above crossover is the same: 6.74 and 6.74 kilohertz-nepers at 34.9° of margin. computed by solving, not by drawing. The logarithm of the device sensitivity |1/(1 + T)|, from the cut loop at 3601 frequencies between 0.01 Hz and 10 GHz, drawn in decibels against linear frequency to 60 kHz. It is −60.0 dB at low frequency, crosses zero at 4.47 kHz (the crossover is 5.73 kHz), peaks at +5.70 dB at 6.87 kHz, and returns towards zero as the loop gain goes. The area below zero is 6.74 kHz·Np (58.6 dB·kHz); the area above, integrated to 10 GHz, is 6.74, of which 6.11 lies inside the drawing. The net is −1.48 × 10⁻⁸ Hz·Np. Bode's sensitivity integral says it must be zero for a loop that falls two poles or more and is stable when cut.

The area that feedback only moves

A feedback amplifier divides its device's variation by the loop gain, sixty decibels of it at low frequency, and pays for it with a sensitivity peak near crossover. The payment is exact. Integrated over linear frequency, the logarithm of the sensitivity has as much area above zero as below — 6.74 kilohertz-nepers each side at 34.9° of margin, net zero to eight parts in a billion — at every margin and every gain, because the loop falls by more than one pole. Margin decides only the shape of the repayment: a 14-decibel spike at 11.7°, a one-decibel hump spread past half a megahertz at 80.4°. Only a loop that falls as a single pole keeps any of it, (π/2) times its crossover, and no amplifier is one.

feedback · Desensitivity
A 10 µs delay in the loop: the peak rises to 13.53 dB and the sensitivity above crossover becomes a comb, and the two areas are still equal — 7.14 kHz·Np each side. computed by solving, not by drawing, from the loop's closed form, held against the netlist's cut loop to a part in a billion. The three-pole amplifier of the area essay (second pole 4 kHz) with a pure delay of 10 µs in its loop. Its margin falls from 34.9° to 14.3° at an unchanged crossover of 5.73 kHz, and the peak of |1/(1 + T)| rises from +5.70 to +13.53 dB. Above crossover the delay keeps turning the loop's phase, so the sensitivity rises and falls about zero with a period of 100 kHz. The area below zero is 7.144 kHz·Np, the area above 7.144, net 9.00 × 10⁻⁵ Hz·Np — integrated to 50 MHz on a grid that takes sixty steps a tooth.

The phase a delay never stops adding

Put a pure delay in a feedback loop and Bode's sensitivity integral does not notice: with 10 µs in the three-pole amplifier's loop the logarithm of the sensitivity still has equal areas above and below zero, 7.14 kHz·Np each side. What changes is where they are. The delay keeps turning the loop's phase above crossover, so the sensitivity becomes a comb with a tooth every 100 kHz; the desensitisation shrinks from 6.74 to 6.48 kHz·Np, the main peak rises from 5.70 dB to 13.53 and overpays it by 7%, and the comb hands the excess back below zero. The margin reads the peak from below by about 1.4 dB at every delay. Past 16.9 µs the loop is unstable and the integral stops balancing — by exactly the growth rate of the pole pair that has crossed.

feedback · Desensitivity
Sampled at 100 kHz, the loop repays its whole debt below 50.0 kHz: 6.60 kHz·Np each side, with a peak of 8.72 dB — the continuous loop had repaid 89% by then. computed by solving, not by drawing, from the loop's exact zero-order-hold equivalent. The three-pole amplifier of the area essay (second pole 4 kHz), closed through a sampler and hold at 100 kHz. The device sensitivity, in decibels, against linear frequency from zero to half the sample rate, where the discrete response ends. Margin 24.7° at a crossover of 5.71 kHz, against 34.9° for the continuous loop; peak +8.72 dB at 6.45 kHz. The area below zero is 6.598 kHz·Np and the area above, all of it inside the band, 6.598; net 1.84 × 10⁻² Hz·Np. The continuous loop, by 50.0 kHz, had repaid 88.6% of its own.

The band a sampled loop repays in

Close the three-pole amplifier's loop through a sampler and hold at 100 kHz and Bode's sensitivity integral still balances — but only over the band below 50 kHz, because that is all the band a sampled loop has. The whole debt, 6.60 kHz·Np, is repaid there; the continuous loop had repaid 88.6% of its own by the same frequency and spends decades above on the rest. Below a tenth of the sample rate the sampled loop is the continuous loop with half a sample of delay, 24.7° of margin against 24.6°. And the finite band turns the equality into a floor: hold the sensitivity 20 dB down over a third of the band and no loop can peak below 10 dB. This loop's floor is low and its margin sets its peak; the sample rate at which the peak is 3 dB above the continuous loop's is 18 times the crossover.

feedback · Desensitivity
A gain of −1 on a part stable only at gains of ten, with 1.25 kΩ across its inputs. computed by solving, not by drawing. A 100 MHz amplifier whose second pole is at 20 MHz, wired as an inverter with two 10 kΩ resistors. Its signal gain is one at a kilohertz on every curve. Its noise gain is two with nothing across the inputs (dashed): 35.0° of margin and 4.4 dB of peaking. A resistor from the summing junction to ground raises the noise gain without touching the signal: at a noise gain of 10 the margin is 65.6°, the peak is 0.00 dB and the −3 dB point is 14.1 MHz.

The gain added to buy a margin

An amplifier sold as stable only at gains of ten — 100 MHz of gain–bandwidth, its second pole at 20 MHz — has 35.0° of margin and 4.4 dB of peaking as a gain of −1, because that gain closes its loop against two. A 1.25 kΩ resistor from the summing junction to ground raises the noise gain to ten without touching the signal gain, which stays one to a part in ten thousand, and the margin becomes 65.6°: still 14.1 MHz of bandwidth, 2.19 times what a unity-stable part from the same die gives at its natural gain. The price is everything the amplifier contributes, multiplied by ten instead of two — 64.0 nV/√Hz at the output against 20.5 — and a capacitor in series with the resistor buys back the low-frequency half of it and none of the wideband total.

feedback · Noise gain
One channel of a summing amplifier whose junction is shared by 8 inputs. computed by solving, not by drawing. Every input has its own 10 kΩ resistor into one junction and a gain of −1 at a kilohertz; the 10 MHz part closes its loop against a noise gain of 9. Input 1's −3 dB point is 1.17 MHz with 8 inputs, against 6.43 MHz with one: 1: 6.43 MHz, 2: 3.95 MHz, 4: 2.21 MHz, 8: 1.17 MHz, 16: 603 kHz. No other input has to be driven for this to happen; it is enough that its resistor is there.

The input that costs every other input

A summing amplifier gives each of its inputs a gain of −1 and closes its loop against one more than the number of inputs, so every input added divides every channel's bandwidth and multiplies the amplifier's own noise — 6.43 MHz with one input, 1.17 MHz with eight, 603 kHz with sixteen, on a 10 MHz part. Above 5.4 inputs the amplifier's 5 nV/√Hz, multiplied by n + 1, outgrows the resistors' Johnson noise, which rises only as its square root. A muted channel whose source is grounded still costs: a sixteen-input mixer is 11.5 dB louder with two channels in use than one whose unused resistors are disconnected. A channel of gain 0.1 beside one of gain 10 is 13.7 dB noisier than alone. A tree of smaller summers doubles the bandwidth and does not make the sum any quieter.

feedback · Noise gain
Three loops with exactly 45° of phase margin, and their step responses. computed by solving, not by drawing; three lags spaced by a ratio r, the amplifier's gain bisected in each for a 45.000° margin, the step from the closed loop's residues. Lags a hundredfold apart need a loop gain of 141 and overshoot 23.6%. Spaced by three they need 4.7 and overshoot 34.5%; coincident, 2.83 and 41.0%. The same margin, and overshoots 1.73 times apart.

One margin, and the gain under it

A phase margin of 45° is quoted as an overshoot of 23 per cent, and on a loop with plenty of gain below its crossover it is: three lags a hundredfold apart, closed at 45°, overshoot 23.6%. Bring the same three lags together and the loop reaches 45° at a loop gain of 2.83 instead of 141, and overshoots 41.0% — the same margin, 1.73 times the ringing. The closed-loop peak follows the overshoot where the margin does not: predicted from the peak the worst error over 27 loops is 3.1 points, from the margin 22.2. The gain margin moves with it, from 37.2 dB to 9.0.

feedback · Margin overshoot
A zero on the right at 1.00 kHz: the straight lines report 46.47° of margin, and the loop has 18.19°. computed by solving, not by drawing, the closed form held to the netlist — an inverting differentiator added back to its input makes the zero — at three frequencies and to the closed loop's poles. An integrator with a zero in the right half-plane at 1.00 kHz, the integrator set so that the straight lines cross unity at 950 Hz. The magnitude, and so the lines, are those of a zero on the left; the phase falls by the zero's angle where the left zero's would rise (dashed). The loop crosses at 3.04 kHz. Read at the lines' crossing with the loop's own phase the margin is 46.47°, and 133.53° with the phase the magnitude implies; at the loop's own crossing it is 18.19°.

The zero the lines put on the wrong side

A zero in the right half-plane has exactly the magnitude of its mirror on the left, so it has exactly the same straight lines, and nothing drawn from a magnitude can say which side it is on. The phase can: it falls where the mirror's rises. An integrator and such a zero, read off its lines, reports 90° − atan x of margin on a loop that has acos x, where x is where the lines cross as a fraction of the zero — so the lines say 45° of a loop with none. Behind one real pole the over-report reaches 37.6° on a loop of 2.1° when the zero sits below the pole, and vanishes when it sits above it: the reading is unsafe exactly when the zero comes first.

frequency · Asymptotic approximation
The droop of the ceramic regulator against the rise time of a 100 mA load, with the capacitor at full value, half and a fifth. computed by solving, not by drawing, marched from the operating point: 10 µF, 5 mΩ of series resistance, 630 pF across the upper divider resistor, the 100 mA arriving as a straight ramp. A step droops 103 mV at 100%, 137 mV at 50%, 203 mV at 20% of the capacitance. A ramp of a millisecond droops 2.98 mV, 2.56 mV, 2.56 mV, and the slowest ramps approach the loop's inductance, 25.2 µH, times the ramp's rate (dashed) — a quantity with no capacitance in it — times 1.18, 1.03, 1.03, the share the loop's ringing adds. The full-value and fifth-value curves cross at 23 µs; slower than that, the larger capacitor droops more.

The load that rises slower than the loop

Every droop a regulator is sized against is a load step with an infinitely fast edge, and a ceramic regulator droops 103 millivolts on its full 10 µF and 203 on a fifth of it. Give the same 100 mA a rise time and the ordering does not survive: past 23 microseconds the full capacitor droops more than the fifth, and a slow ramp's droop is the loop's own 25.2 µH times the load's rate of change — a number with no capacitance in it, raised 18 per cent on the full capacitor by the impedance peak its slower loop leaves. For a 10 mV budget the load must take 298 µs to arrive on the full capacitor and 253 on the fifth.

applied · Regulator
A gain of ten round an amplifier with a second pole: its half-power bandwidth and its noise bandwidth, each over what the gain–bandwidth product predicts. computed by solving, not by drawing: the stage as a netlist round a two-pole amplifier of 1 MHz, the second pole placed at r times GBW/G. The half-power bandwidth agrees with the second-order closed form √r·g(√r/2) to two parts in a thousand at every placement: 1.000 at r = 0.5, 1.272 at r = 1, 1.414 at r = 2, 1.231 at r = 5, 1.110 at r = 10, 1.010 at r = 100 times GBW/G. It is 1.414 times the product's prediction at r = 2 and within ten per cent only beyond r = 10. The noise bandwidth is (π/2)·GBW/G to half a per cent at every r: the second pole moves the one and leaves the other where it was.

The bandwidth the product still gets right

Gain times bandwidth is a constant for an amplifier with one pole, and real amplifiers have a second. Put it at r times the closed-loop bandwidth the product predicts and the half-power bandwidth becomes √r·g(√r/2) times GBW/G — 41.4 per cent wide at r = 2, within ten per cent only beyond r = 10 — so a follower round a 1 MHz part with its second pole at 2.5 MHz runs 40 per cent wider than the rule says. The noise bandwidth does not move at all. A second-order loop's noise bandwidth is set by one coefficient the second pole cannot touch, and it stays (π/2)·GBW/G at every r and every gain, to half a per cent on the netlist. A third pole is what breaks it.

feedback · Gain-bandwidth
One loop, cut at its output wire with 160 nF on it: the voltage injection crosses unity twice, the current injection reads 57 dB too much at low frequency, and together they are the loop gain. computed by solving, not by drawing. A three-pole amplifier closed for a gain of a hundred, with 100 Ω of output resistance and 160 nF of load. The loop gain read at the controlled source's own input, which draws no current (solid); read by a voltage injected in series with the output wire (dashed); and by a current injected into the same wire (dotted). The true loop crosses unity at 5.31 kHz with 8.9° of margin. The voltage reading first crosses at 5.04 kHz with 15.1°, and rises through it again at 10.6 kHz, because above 9.95 kHz the load is a lower impedance than the source. The current reading crosses at 5.82 kHz with 19.8°. Combined through 1/(1 + T) = 1/(1 + Tv) + 1/(1 + Ti) (dots), the two give the controlled source's reading to 3e-9 at every frequency.

Two wrong readings and one loop gain

A loop gain measured on a bench is measured at a wire, and a wire has an impedance on each side. Cut an amplifier's output with 100 Ω behind it and 160 nF ahead, inject a voltage in series, and the reading is the loop gain plus (1 + T)·Zs/Zl — 15.1° of margin where the loop has 8.9°, and a second unity crossing at 10.6 kHz that the loop does not have. Inject a current into the same wire and the error is (1 + T)·Zl/Zs: 19.8°, and 57 dB too much loop gain at low frequency. The two errors are reciprocal, so the readings combine exactly: 1/(1 + T) = 1/(1 + Tv) + 1/(1 + Ti) returns the loop gain at the controlled source's own input to a few parts in a billion, at every frequency and every load.

feedback · Loop gain
Two loops with exactly 45° of margin and the same crossover: with 100% of the extra lag a delay, the step overshoots 28.7%, against 23.3% for two poles. computed by solving, not by drawing: the closed-loop step of a loop K·exp(−sD)/(s(1 + s/p)) with its crossover at one, its phase margin exactly 45°, and 100% of the 45° beyond the integrator supplied by the delay (solid), against the same margin from a lag alone (dashed). Delay 0.785, lag's pole absent. Overshoot 28.7% against 23.3%; settled within 2% at 7.03 against 7.06; gain margin 6.0 dB against no limit. Marched with a history buffer, and at δ = 1 checked against the exact series of the method of steps.

The margin a delay spends

A phase margin can be made of a lag or of a delay, and the number is the same either way. Forty-five degrees from a lag overshoots 23.3 per cent, and forty-five degrees from a delay overshoots 28.7; at sixty degrees the sign reverses, 8.77 against 5.57, and the two cross near 54 degrees. The overshoot is the smaller difference. A two-pole loop's gain margin has no limit at all, and five per cent of its extra lag as delay brings that to 25.5 dB; with all of it delay the gain margin is 90°/(90° − margin), which is 6.0 dB at 45°, and nothing else is in the expression. Across twenty-one such loops the margin alone misses the overshoot by 13.1 points. The closed-loop peak, which already reads the whole band, misses by 1.2.

feedback · Margin overshoot

Named alongside it

The objects these essays reach for when they reach for this one.

Loop gainDesign tradeoffModel rangeNoise gainCrossover frequencyLead compensationDamping ratioStabilityBode plotEquivalent series resistanceGain marginJohnson noise

All concepts