Circuit Response
every model has an edge, and the figure carries it
Concept

Sampled data — where it appears

A system whose signals exist at instants rather than continuously. Its response is periodic in the clock and every frequency above half the rate arrives folded onto one below it, so what it does between the instants is decided by the arrangement rather than by any continuous approximation.

Named by 8 essays across 4 fields — each of them below, with the objects they name alongside it.

A switched capacitor is a resistor below a ratio, not below a frequency. computed by solving, not by drawing. The exact response of a capacitor shuttled between the input and a holding capacitor at 1.00 MHz — a difference equation with one pole, evaluated on the unit circle — against the continuous R–C its equivalent resistance is supposed to make. The corner is 3.15 kHz against the model's 3.18 kHz, 0.99% out, and the discrepancy is set by the capacitor ratio alone: one per cent needs a ratio under 0.0201, which is a clock 315 times the corner. The second difference has no counterpart at all — the sampled response repeats at the clock, so the image rising on the right of this plot is signal at 997 kHz arriving as though it were at the corner. The third is settling: 1 pF charged through 1 kΩ gets 500.0 time constants a half period at this clock, and being short of full charge raises the equivalent resistance by 0.000%, which puts a ceiling on the clock at 108 MHz.

A resistor made of a clock

A capacitor shuttled between two nodes at a megahertz behaves as a megohm, and a tenth of a picofarad shuttled at ten kilohertz behaves as a gigohm — which is how a filter with a one-hertz corner fits on a chip. What the equivalence costs is three conditions, and they bind on three different quantities: a capacitor ratio under 0.0201, a signal below half the clock, and a clock below the frequency at which the charge stops arriving.

filters · Switched-capacitor Same 2 ps of jitter: a floor at -121 dB, or a line at -91. computed by solving, not by drawing. A 3.337 MHz sinusoid sampled at 10 MHz with two clocks of identical root-mean-square jitter. One clock's timing error is independent gaussians and the other's is a sinusoid at 130 kHz. The total error power is the same — -87.43 and -87.55 decibels below the signal, against the closed form's -87.55 — and the pictures are not. The random clock spreads it over 2048 bins, -120.5 dB each; the modulated one puts it into two lines at 3.337 ± 0.130 MHz, -91.5 dB down. A specification in picoseconds does not choose between them.

A floor, or a line

Two clocks with identical two-picosecond jitter sample the same sinusoid, and the total error power is the same to a tenth of a decibel — the closed form an earlier essay computed, right for both. One of them puts that error across two thousand bins at −120 dB each; the other puts it into two lines at −91.5. The gap is the processing gain, it grows with the record length because a density falls and a line does not, and nothing in a specification quoted in picoseconds root-mean-square distinguishes the two cases.

digital · Aperture jitter The "offset" a switch leaves moves by 1.863 mV across a volt of signal. computed by solving, not by drawing. The charge a switch leaves on a 1 pF hold capacitor, as the input it was sampling changes. It is W·L·C_ox·(V_gs − V_th) with the clock's high level for the gate, so it falls as the input rises for two reasons at once: less gate drive, and a threshold that rises with the source potential through the body effect. The dashed line is the part that does not know what the signal is — the clock coupling through the gate overlap capacitance, -1.649 mV — and it is the only part of this that is honestly an offset. The curve stops where the switch does: an n-channel device passes nothing within a threshold of its own gate, and the model refuses rather than returning a zero.

The offset that knows the signal

The charge a switch leaves on the capacitor it was sampling is the gate oxide capacitance times the channel area times the overdrive, and both terms in that overdrive depend on the input — one directly and one through the body effect. So the 5.67 mV a data sheet would call an offset moves by 1.86 mV across a volt of signal, which is a gain error of 0.186 per cent and only 3.4 µV of anything else. Opening the summing-node switch first divides the gain error by the amplifier's own gain, exactly, and what is left goes from twenty-nine times the sampled-noise floor to nineteen times below it.

filters · Switched-capacitor Where "the noise is the density over twice the window" is true for a mean of 600 samples. The exact sampled autocorrelation of a one-pole front end, summed in closed form and checked against seeded samples through the same filter. The solid curve is the reading's noise power divided by what the rule gives. It crosses one at 0.1355 of half the sample rate and nowhere else, so the rule is right at one front-end bandwidth rather than over a range: it is within one per cent from 0.0712 to 0.205 of half the sample rate, a window a factor of 2.88 wide. Above it the front end admits noise from past half the sample rate and the sampler folds it in, the ratio tending to (x/2)·coth(x/2) with x = 1/(τ·fₛ), which has no N in it — so the sample rate must be 9.7 times the front end's noise bandwidth for one per cent, not twice it. Below it the front end has already removed noise the rule charges for, and the faint curve — the √N law's own error, which is a claim about the samples rather than about a density — shows why: consecutive samples are correlated by ρ = e^(−1/(τ·fₛ)) and a mean of 600 of them is a mean of fewer things.

The window the square-root law has

Averaging N readings divides the noise power by N only if the readings are independent, and samples of a filtered noise are independent only over a band. Measured on the exact sampled autocorrelation, the rule that a reading's noise is the density over twice the window is right at one front-end bandwidth and wrong on both sides — a factor of three wide at six hundred samples, asking the sample rate to exceed the front end's noise bandwidth by about ten rather than by two. Above it the folded noise arrives at full amplitude; below it the front end has removed noise the rule is still charging for.

noise · Noise bandwidth A band from zero to its top frequency takes 4.77 dB less from 10 ps of jitter than a tone at the top: it is the rms frequency that counts, not the highest. computed by solving, not by drawing. Forty-eight equal tones at random phases filling a band from 0 to 1 of its top frequency, sampled 16,384 times at instants displaced by a seeded 10 ps Gaussian, at seven top frequencies from 100 kHz to 100 MHz. The measured signal-to-error ratio (dots) is 88.64 dB at 1 MHz, against −20 log(2π × rms frequency × jitter) = 88.76 dB from the band's power-weighted rms frequency, 580 kHz — and against 84.04 dB for a tone at 1 MHz itself. The gap is 4.77 dB at every frequency, 10 log(3/(1 + r + r²)) for a flat band from r to 1 of the top: 4.77 dB (a factor of √3 in frequency) for a band from zero, nothing for a narrow one. At 1 MHz the band holds 14.43 bits where the tone holds 13.67.

The frequency a band moves at

The jitter rule is written for a sinusoid: ten picoseconds holds a tone at 1 MHz to 84.04 dB. A signal that fills the band up to 1 MHz holds 88.64 dB against the same clock, because each sample's error is its own slope times its own timing error, and a band's slope is set by its rms frequency — the top frequency over √3 for a flat band, 4.77 dB better. Pink content up to 1 MHz is 11 dB better than the rule and content falling as 1/f² is 29 dB better. So the same ten picoseconds hold sixteen bits to 199 kHz for a tone, 344 kHz for a flat band and 734 kHz for a pink one: an aperture figure needs a signal as well as a frequency.

digital · Aperture jitter Sampled at 100 kHz, the loop repays its whole debt below 50.0 kHz: 6.60 kHz·Np each side, with a peak of 8.72 dB — the continuous loop had repaid 89% by then. computed by solving, not by drawing, from the loop's exact zero-order-hold equivalent. The three-pole amplifier of the area essay (second pole 4 kHz), closed through a sampler and hold at 100 kHz. The device sensitivity, in decibels, against linear frequency from zero to half the sample rate, where the discrete response ends. Margin 24.7° at a crossover of 5.71 kHz, against 34.9° for the continuous loop; peak +8.72 dB at 6.45 kHz. The area below zero is 6.598 kHz·Np and the area above, all of it inside the band, 6.598; net 1.84 × 10⁻² Hz·Np. The continuous loop, by 50.0 kHz, had repaid 88.6% of its own.

The band a sampled loop repays in

Close the three-pole amplifier's loop through a sampler and hold at 100 kHz and Bode's sensitivity integral still balances — but only over the band below 50 kHz, because that is all the band a sampled loop has. The whole debt, 6.60 kHz·Np, is repaid there; the continuous loop had repaid 88.6% of its own by the same frequency and spends decades above on the rest. Below a tenth of the sample rate the sampled loop is the continuous loop with half a sample of delay, 24.7° of margin against 24.6°. And the finite band turns the equality into a floor: hold the sensitivity 20 dB down over a third of the band and no loop can peak below 10 dB. This loop's floor is low and its margin sets its peak; the sample rate at which the peak is 3 dB above the continuous loop's is 18 times the crossover.

feedback · Desensitivity Averaging an input that drifts 1 µV a cycle through a 1 pF switched-capacitor averager: too short a memory keeps the noise, too long a lag, and the best is 16.5 cycles at 27.2 µV. computed by solving, not by drawing, and seeded. A switched-capacitor exponential averager — 1 pF sampling capacitor, an equal damping capacitor for unity gain, memory set by the feedback capacitor — fed a ramp of 1 µV a cycle. The rms error against the input (solid) is the lag (dashed), (a/(1 − a))·r, and the switch noise (dotted), 2kT(Cs + Cd)/(Cf²(1 − a²)), together; seeded marches of sixty thousand cycles (dots) agree to 5%. The best memory is 16.55 cycles against (kT/(Cs·r²))^(1/3) = 15.88, with 27.2 µV of error: 15.5 µV of lag and 22.3 µV of noise.

The leak worth building in

An integrator that never forgets cannot follow an input that moves. Give a switched-capacitor integrator a deliberate leak — a damping capacitor that samples the output each cycle and takes its charge away — and it becomes an exponential average with a memory of Cf/Cd cycles. Fed an input drifting 1 µV a cycle, through a 1 pF sampling capacitor, too short a memory passes the switch noise and too long a memory lags the drift; the best, on the exact closed form and on seeded marches of sixty thousand cycles, is 16.5 cycles, for 27.2 µV of error against 89.5 µV in a single sample. The best memory follows a cube-root law, the cube root of kT/(Cs·r²), ten times the drift for a memory 4.64 times shorter, and at it the noise variance is twice the squared lag. And the leak is not free: the damping capacitor is switched too, and at unity gain it samples half of the averager's noise.

noise · kT/C noise A stray of a tenth of the sampling capacitor moves a one-plate integrator's coefficient by 9.85%; switched at both plates, by 0.14%, nearly all of it the amplifier's own gain error. computed by solving, not by drawing. A switched-capacitor integrator with a 1 pF sampling capacitor, 4 pF of feedback and 0.5 pF at the amplifier's input, and a stray capacitance to ground at the sampling capacitor's switched plate; the error of the per-cycle coefficient against Cs/Cf, against the stray as a fraction of Cs. With one plate switched (solid) the stray is charged to the input and dumped with the capacitor, so it is part of the capacitor: the error is the stray's fraction less the amplifier's small gain error, 9.85% at a tenth. With both plates switched (dashed, A = 1000; dotted, A = 10⁵) the plate that meets the summing node moves between ground and −Vo/A, so the stray's charge carries a factor 1/A: its sensitivity falls from 1/Cf to Cs/(A·Cf²), 4000 times smaller, and what is left, 0.14%, is the amplifier's gain error (1 + (Cx + Cs)/Cf)/A, which the one-plate arrangement has as well.

The capacitance at the switched plate

A switched-capacitor filter's corner is a ratio of two capacitors, and every plate on a chip has a capacitance to the substrate that is on no schematic. Switch one plate of the sampling capacitor and that stray is charged to the input and dumped with it: a stray a tenth of the capacitor is a tenth of error, and a bottom plate's fifteen per cent is fifteen per cent at any size. Switch both plates and integrate into a virtual ground and the stray at the plate that meets the summing node moves only between ground and −Vₒᵤₜ/A — its sensitivity falls from 1/Cf to Cs/(A·Cf²), four thousand times less at a gain of a thousand, and what is left is the amplifier's own gain error, 0.14%. The stray has not vanished: it has moved out of the coefficient that sets the corner and into the integrator's leak, where the direct-current gain becomes A·Cs/(Cs + Cp).

filters · Switched-capacitor

Named alongside it

The objects these essays reach for when they reach for this one.

Switched-capacitorLoop gainModel rangeAliasingAperture jitterAveragingCapacitor ratioDesign tradeoffEquivalent resistanceGain errorkT/C noiseMeasurement condition

All concepts