The leak worth building in

The average an integrator can hold found a switched-capacitor integrator to be the ideal averager for kT/C noise — every cycle’s sample is independent, because the sampling capacitor is reset — and found its one limit in the amplifier: a finite gain makes the integrator leak, the leak caps the average at $2A C_f/C_s$ cycles, and the noise stops falling at $\sqrt{kT/(A C_f)}$. The leak was the enemy. The essay ended by noting that it need not be: a leak with a known time constant turns the integrator into an exponential average, which can follow an input that changes, and a perfect integrator cannot.

That is the case most measurements actually face. A sensor’s output drifts with temperature, a reference ages, a bias moves with the supply, and the quantity worth knowing is the current value, not the average since switch-on. An average that remembers everything reports the past with great precision. An average that remembers nothing reports the present with all of its noise. Between them is a memory that does best, and it can be computed — once it is admitted that the leak which sets the memory is itself a switched capacitor, with noise of its own.

An integrator with a leak in it #

The circuit is the earlier essay’s integrator with one capacitor added. Each cycle the sampling capacitor $C_s$ takes the input and dumps its charge into the feedback capacitor $C_f$, as before. Now a damping capacitor $C_d$ also connects to the output each cycle, charges to the output voltage, and is discharged to ground — taking away a fraction $C_d/C_f$ of the output’s charge every cycle. With an ideal amplifier,

$$V[n] = \left(1 - \frac{C_d}{C_f}\right)V[n-1] + \frac{C_s}{C_f}V_{in}[n] + \frac{q_s - q_d}{C_f},$$

where $q_s$ and $q_d$ are the charges the two switched capacitors’ switches leave behind, each of variance $2kTC$ a cycle — two phases, each a kT/C sample, as the noise a clock does not make established for a switched capacitor. That is an exponential average: a pole at $a = 1 - C_d/C_f$, a memory of $N = 1/(1-a) = C_f/C_d$ cycles, and a direct-current gain of $C_s/C_d$, which is one when the damping capacitor equals the sampling one.

The figure is made two ways. The closed form takes the recursion and writes its steady-state response to a ramp — a lag of $a/(1-a)$ cycles’ worth of drift — and its stationary noise, $2kT(C_s + C_d)/(C_f^2(1 - a^2))$, both referred back to the input by dividing by the gain. The march runs the recursion itself for sixty thousand cycles with seeded normal draws for both switches’ charges, discards the transient, and measures the rms of the difference between the output and the input. At memories of 2, 8, 32 and 128 cycles the two agree to five per cent.

Lag against noise #

The two parts of the error move in opposite directions with the memory. The lag grows in proportion: an exponential average of a ramp runs $N - 1$ cycles behind it, so at 1 µV a cycle and a memory of a hundred it is a hundred microvolts out. The noise falls as the square root: a single sample from a 1 pF capacitor through two switch phases carries 89.5 µV, and an average over $N$ cycles roughly $\sqrt{2/N}$ of what a single unity-gain cycle would leave. The sum has a minimum.

At a drift of 1 µV a cycle the minimum is at 16.5 cycles of memory, where the rms error is 27.2 µV — 15.5 of lag and 22.3 of noise, combined in quadrature. That is a third of a single sample’s noise, and it is the best any exponential average of this input can do. A memory of 3 cycles leaves 49.6 µV; one of 80 leaves 72 µV, almost all of it lag.

The trace shows what the numbers mean on one stretch of seeded draws. The three-cycle average follows the ramp closely and jitters with it, because it is averaging over too few samples to suppress the noise. The eighty-cycle average is smooth and runs parallel to the ramp, eighty microvolts below it — an offset that a reader would take for a calibration error. The sixteen-cycle average is close to the best memory for this drift, and on this stretch it is within 32 µV of the truth: neither as smooth as the long one nor as prompt as the short one, and closer than either.

The best memory is a cube root #

For memories much longer than a cycle the squared error is simple. The lag is $N r$ and the noise variance, referred to the input at unity gain, is $2kT/(N C_s)$ — the earlier essay’s sampling noise, $2kT/C_s$ a cycle, averaged over about $N/2$ independent cycles and doubled by the damping capacitor’s own contribution. Minimising $N^2 r^2 + 2kT/(N C_s)$:

$$N^* = \left(\frac{kT}{C_s\,r^2}\right)^{1/3}.$$

On the exact closed form the best memory is 342.8 cycles at 10 nV a cycle, 74.4 at 100 nV, 16.5 at 1 µV and 4.1 at 10 µV, against the law’s 342.1, 73.7, 15.9 and 3.4. The two differ by a nearly constant 0.7 of a cycle, because the exact lag is $(N - 1)r$ rather than $Nr$; on a logarithmic plot that difference vanishes at long memories and dominates at short ones. The slope is −0.665 against the law’s −2/3: ten times the drift asks for a memory $10^{2/3} = 4.64$ times shorter, and a thousand times the drift for one a hundred times shorter.

A cube root is a weak dependence, which is useful. A designer who guesses the drift wrong by a factor of three chooses a memory wrong by a factor of 2.08, and because the error near the optimum is flat — the minimum of a sum of a rising and a falling term — the cost of that error is modest. The capacitor appears to the minus one third as well: a bigger sampling capacitor has less noise per sample and wants a shorter memory, but only as the cube root of the capacitance.

The averager’s noise is a kT/C #

The long-memory noise term has a form worth reading twice. Referred to the input at unity gain it is $2kT/(NC_s)$, and since the memory is $N = C_f/C_d = C_f/C_s$ at unity gain, that is $2kT/C_f$: the averager’s output noise is the kT/C of its feedback capacitor, doubled, and the sampling capacitor has left the expression. The total that has no resistor in it found the continuous version of that statement — an RC low-pass carries exactly $\sqrt{kT/C}$ of noise whatever its resistor — and the average an integrator can hold found the integrator’s floor with the feedback capacitor and the gain in it and the sampling capacitor nowhere. The switched averager is the sampled version of the same object: its memory sets a bandwidth, its feedback capacitor sets a kT/C, and the sampling capacitor decides only how many cycles it takes to fill the memory.

That reframes the optimum. Choosing the memory at a fixed sampling capacitor is choosing the feedback capacitor, and the cube-root law is a law for $C_f$: the best feedback capacitor is $C_s N^*$, which for a 1 pF sampling capacitor and 1 µV a cycle is 16.5 pF. A larger feedback capacitor is quieter and slower in exact proportion, which is the trade the whole field has been making in one form or another.

Building it #

In hardware the design is three capacitors and a clock. With 1 pF of sampling capacitor and an equal damping capacitor for unity gain, a memory of 16.5 cycles needs 16.5 pF of feedback; at a clock of 100 kHz the averager’s time constant is 165 µs, and it follows a drift of 1 µV a cycle — 0.1 V a second — with 27 µV of error. The damping capacitor, switched at 100 kHz, behaves as a resistor of $1/(f_{clk}C_d)$ = 10 MΩ across the feedback capacitor, which is exactly a resistor made of a clock: the leak is a switched-capacitor resistor, with the ratio accuracy that implies, so the memory is set by $C_f/C_d$ and holds to the matching of two capacitors rather than to a resistor’s tolerance.

The same accuracy argument applies to the gain: $C_s/C_d$ is a ratio of two capacitors on one die, good to a tenth of a per cent. A unity-gain averager built this way has no gain error to speak of, which is part of why a designer might accept its $\sqrt 2$ noise penalty over a high-gain version. And the stray capacitances at the switched plates enter exactly as the capacitance at the switched plate measured: switched at both plates, they are divided by the amplifier’s gain and move the leak rather than the ratio.

The leak samples its own noise #

The derivation slipped one fact in through a doubling, and it deserves its own figure. A leak made from a switched capacitor is a switched capacitor, and every switched capacitor samples kT/C.

At a fixed memory of 32 cycles and unity gain the averager’s input-referred noise is 15.9 µV. The damping capacitor contributes half of the variance: each cycle it leaves a charge of variance $2kT C_d$, which at $C_d = C_s$ equals the sampling capacitor’s. Make the damping capacitor a tenth of the sampling one — a gain of ten, the memory held by scaling the feedback capacitor — and the input-referred noise falls to 11.8 µV, because the damping capacitor’s noise is smaller and the gain that divides it is larger. Make it ten times larger and the noise rises to 37.4 µV. The seeded marches agree with the closed form to five per cent at every ratio.

So the cleanest averager is one with gain — a small leak and a large sampling capacitor — and a unity-gain averager pays a factor of $\sqrt 2$ in noise for its gain of one. The capacitance at the switched plate found that a switched capacitor’s strays can be moved out of the ratio that matters into the leak; the leak’s noise cannot be moved anywhere, because it is the leak.

Two parts noise to one part lag #

There is a rule in the optimum that does not depend on the drift.

At the best memory the noise variance is twice the squared lag. The long-memory expression makes this exact: the squared error $N^2r^2 + 2kT/(NC_s)$ is stationary where its two terms’ slopes balance, $2Nr^2 = 2kT/(C_sN^2)$, which says the noise term is twice the lag term. On the exact closed form the ratio is 2.014 at 0.1 µV a cycle and 2.064 at 1 µV, drifting above two only where the best memory is a few cycles. So the optimal averager’s error is one third lag and two thirds noise in variance — its rms lag is $1/\sqrt 3$ of its rms error — and the seeded marches confirm the lag as the mean of the error to within their sampling.

The rule is useful as a check on a running system. An averager whose output is visibly behind a ramp, by an amount comparable with its noise, is not mistuned: a lag of about $0.58$ of its rms error is exactly what the optimum looks like. One that tracks a ramp with no visible lag is set too short, and one whose lag is larger than its noise too long.

Where this sits among the averages #

The averaging essays now form a sequence, each removing an idealisation. The average that is not N times quieter found that averaging samples taken too close together gains less than the square root of their number, because they share their noise; the average an integrator can hold found the integrator’s samples independent by construction and its average capped by the amplifier’s leak. This essay chooses the leak, and finds the memory the input’s own behaviour asks for. All three are the same square root of the window the square-root law has, applied to a different correlation structure — and this one adds the input’s correlation with itself, the drift, which an average fights rather than exploits.

The finite amplifier gain of the earlier essay has not gone away. It adds a leak of its own, of memory $2A C_f/C_s$ cycles, in parallel with the deliberate one, and for the memories here — tens of cycles, with gains of thousands — it is negligible. It would matter for a slow drift, where the best memory approaches the amplifier’s own cap, and there the two leaks combine and the deliberate one has to be made correspondingly shorter.

What a ramp leaves out #

The drift here is a straight ramp, the simplest input an average can be wrong about. A real drift wanders: a reference whose temperature follows the room, a sensor whose bias random-walks. An input that random-walks has a lag error that is itself random, with a variance growing as the memory, and the optimum then balances two noises rather than a noise and a deterministic lag — the result is a square root rather than a cube root, which is the Kalman filter’s answer for a random-walk state observed in white noise. The ramp is the right model for a slow, steady drift between recalibrations; the random walk for an input that is unpredictable cycle to cycle.

And the slowest drift of all is an offset, which an average of any memory follows perfectly and therefore cannot remove. Where the quantity wanted is a change rather than a level — a sensor’s response to a stimulus, against its own slowly wandering baseline — the better move is the one the sample that is subtracted made for a capacitor’s reset level: take a reference sample close in time and subtract it. That doubles the white noise and removes everything slow, where the exponential average reduces the white noise and follows everything slow; the two are complementary, and a measurement chain that needs both a clean level and a clean change uses one for each.

The numbers #

A unity-gain switched-capacitor averager with a 1 pF sampling capacitor, following an input that drifts 1 µV a cycle, is best at a memory of 16.5 cycles, with 27.2 µV of error against 89.5 µV in one sample — 15.5 µV of lag and 22.3 µV of noise. The best memory is $(kT/(C_s r^2))^{1/3}$ plus about 0.7 of a cycle: 343 cycles at 10 nV a cycle, 4.1 at 10 µV, a slope of −0.665. The leak’s own switch noise is half the variance at unity gain; with a tenth of the damping capacitor the input-referred noise falls from 15.9 to 11.8 µV. At the optimum the noise variance is twice the squared lag, 2.014 to 2.064 wherever the memory is long.

Still open: a wandering drift, an energy per estimate, and an adaptive memory #

A drift that random-walks. With an input that random-walks rather than ramps, the lag is a noise of its own and the optimal memory follows a square root of the ratio of the two noise densities. Where the cube-root and square-root laws cross — at what ratio of steady drift to random wandering — is the boundary that says which rule a real reference obeys.

The energy per estimate. Each cycle charges two capacitors from the input and the output, so an averager’s energy per estimate rises with its clock while its noise falls with its memory. The clock rate that minimises energy for a stated error on a stated drift — a trade between cycles per unit of drift and memory in cycles — is a number a low-power sensor interface would want.

A memory that adapts. The two-to-one rule is a measurement the averager can make on itself: comparing its output’s recent mean offset against its recent spread would say whether its memory is too long or too short. Whether a leak switched between a few capacitor values by that comparison converges to the optimum, and how quickly when the drift changes, is a loop with a noise estimator in it.