Half a clock against a pole
Assumes: The staircase on the way out · What is left at crossover
The pole a straight line is worth found that joining a converter’s samples with straight lines instead of holding each one is worth exactly one pole of reconstruction filter, and costs a whole clock of delay where the hold costs half. For a converter feeding a loudspeaker the half clock is latency, microseconds nobody hears — the case the staircase on the way out and its successors were written for. For a converter feeding an actuator inside a control loop it is something else: a delay in a loop is phase lag at the crossover, and phase at the crossover is the margin the loop has.
That essay ended with the question this one takes up. A designer who needs the nearest image of a control loop’s output rejected — because an actuator or a motor winding would otherwise carry a tone near the clock — can buy the rejection two ways. One is the straight line, at half a clock more delay. The other is to keep the hold and add an analogue pole after it. Both cost phase at the crossover. The question is which costs less, and whether the answer depends on how fast the loop is against its clock.
The loop
The loop is the plainest one that has the question in it. The plant is an integrator; the controller compares the output with the setpoint at every clock edge and sends the difference, unscaled, to the converter; the converter emits either a held staircase or straight lines between its samples, and in the third case the staircase passes through a single analogue pole on its way to the plant. The integrator’s gain puts the continuous loop’s crossover at a fraction of the sample rate, and everything below is drawn against .
With the crossover at a tenth of the clock the hold alone gives a clean step with no measurable overshoot. It also does nothing about the image at nine tenths of the clock. The straight line rejects that image by one more sinc — at the image’s own frequency, as the nulls are where nothing is found every sinc does — and overshoots 13.7 per cent. The hold followed by the pole that rejects the image by the same amount overshoots 32.8. The same rejection, bought two ways, and one of them costs the loop more than twice the overshoot of the other. The slider on the figure at the head of the page moves the crossover from 5 to 20 per cent of the clock, and the order of the three holds until the last setting.
Where the equal pole has to go
“The pole that rejects the image by the same amount” needs a definition, and the definition decides the result. The one used here is the plainest a designer would reach for: the single pole whose attenuation at the nearest image, at of the clock, equals the straight line’s second sinc there.
The second sinc at the image is . A pole far below a frequency attenuates it by its corner over the frequency, so the corner that matches is of the clock, and dividing by the crossover gives
The figure computes the exact corner and it is 0.990 of the crossover at a tenth of the clock, 0.998 at a twentieth, and never more than fifteen per cent below the crossover out to 0.4 of the clock. The equal pole sits at the crossover. That is not a coincidence of these numbers but the content of the identity the straight-line essay found: a sinc rejects an image, relative to the band, by exactly the distance ratio, and a pole achieves the same only when its corner is at the bottom of the band — which, for a loop, is the crossover.
A pole at the crossover lags forty-five degrees at the crossover. And that is independent of : however slow the loop is against its clock, the equal pole follows the crossover down and costs its forty-five degrees.
Forty-five degrees against 180r
The straight line’s extra half clock costs degrees at the crossover — half a clock at a frequency of the clock is of a cycle. So the two ways of rejecting the image have phase costs of entirely different shapes.
The straight line’s total lag is a line through the origin, , and a delay’s lag growing without limit is what makes a delayed loop able to fail on more than one side, as stable, and unstable with less gain found for a loop with leads in it. The hold with the equal pole is the hold’s plus the pole’s , which starts at forty-five degrees and climbs slowly. They cross where the extra half clock’s equals the pole’s arctangent, at r = 0.2599 — a crossover a quarter of the clock, a speed no ordinary digital loop runs at. Below it the half clock is the cheaper filter by the difference, and at a tenth of the clock that difference is 27.3 degrees of margin: the integrator loop keeps 54 degrees with the straight line and 27 with the hold and its pole.
That is the whole of the phase argument, and it points at something the straight-line essay’s comparison missed. There the equivalent pole was the one with the same droop at the band edge, which sits far above the band and rejects the image hardly at all; against that pole the straight line looked like an expensive way to get one pole’s worth. The pole that actually does the straight line’s job is at the bottom of the band, and in a loop the bottom of the band is where the margin is decided.
The same phase, spent on a pole
The comparison can be run the other way, and it makes the difference plainer. Take the eighteen degrees the straight line spends at a crossover of a tenth of the clock and spend them on a pole instead: a pole lagging exactly degrees at the crossover has its corner at of the clock, 0.308 here, three times the crossover. At the image, at nine tenths of the clock, that pole attenuates by , which is 9.8 dB. The straight line, for the same eighteen degrees, attenuates the image by one more sinc: relative to the signal, 19.1 dB.
The pole’s figure hardly depends on the loop. As falls, the corner of a pole lagging degrees tends to of the clock, and its attenuation at the image tends to , 10.4 dB, whatever the crossover: 10.2 at a fiftieth of the clock, 10.0 at a twentieth, 9.7 at three twentieths. The straight line’s grows as the loop slows, 25.6 dB at a twentieth and 33.8 at a fiftieth. So the phase a straight line spends buys about twice the rejection a pole would buy with it at a tenth of the clock and more than three times at a fiftieth, and the reason is the same identity again: the sinc’s rejection is a distance ratio in decibels, while a pole’s is capped by how far above the crossover the phase budget lets it sit.
This form of the comparison is also the one that survives a change of definition. It does not depend on how the equal pole is matched to the image, on the signal’s level at the crossover, or on the plant; it compares two ways of spending one quantity, the margin, on another, the rejection.
The loop marched, and a fifth of the clock
A phase estimate treats the sampled loop as a continuous one with a delay in it. That is accurate when the crossover is well below the clock and gets worse as it rises, because a sampled loop sees its own sampler as well as its converter. The straight line’s claim needs the loop marched.
The marched loop keeps the order and moves the crossing. The overshoot is read directly off each step, which is the measurement two measurements of one margin found returning a different margin from the Bode plot’s even for a continuous loop. At a twentieth of the clock the straight line gives no overshoot at all and the hold with its pole 23.6 per cent; at a tenth, 13.7 against 32.8. The two overshoot equally at r = 0.176, bisected on the marched loops, where the phase estimate said 0.260. Near a fifth of the clock the continuous picture of the loop stops describing it, and the straight line’s advantage ends sooner than the estimate promised.
A fifth of the clock is still an unusually fast loop. A digital controller is normally clocked ten to thirty times faster than its crossover, precisely so that the hold’s half clock costs only a few degrees, and at those ratios the straight line wins by a wide margin by either measure. Above about a sixth of the clock the hold with an analogue pole becomes the better way to reject the image, and at those speeds the hold alone is already costing thirty degrees and neither option is attractive.
The same image, measured twice
The argument rests on the two reconstructions rejecting the image equally. That was a definition made in closed form; it is worth checking on the waveforms the converter would actually emit.
Read from each waveform’s own transform, the hold leaves the image 19.1 dB below the signal when the crossover is a tenth of the clock, and the straight line 38.2 dB — exactly twice, as it should be. The factor of two in decibels is the squaring one knob, and the two exponents it turns tracked through the oversampling ratio. The hold’s measured image passed through the equal pole is 35.3 dB down. The pole was matched on the image’s absolute level, and it also attenuates the signal at the crossover by three decibels, so relative to the signal it leaves the image three decibels higher than the straight line. The comparison above is therefore slightly generous to the pole: a pole matched on the image relative to the signal would sit a little lower and cost a little more phase.
Where the image goes after the converter
It is worth being clear about what the rejection is for, because the plant has an opinion. An integrator’s gain falls as one over frequency, so relative to the crossover it passes the image, at of the clock, reduced by a factor of : another , 19.1 dB at a tenth of the clock. That is exactly one more sinc’s worth, for the same reason the sinc is worth a pole — each is a factor of one over frequency. So at the plant’s output the hold alone already leaves the image 38.2 dB below the signal, the same figure the straight line leaves at the converter.
The controlled quantity, in other words, is rarely where the image does harm. The harm is in the drive: the current in a motor winding or a voice coil, the voltage across a piezoelectric stack, the heating and the audible tone and the wear that a component near the clock frequency causes in the actuator itself, whatever the position or the speed does. That is the signal the converter’s rejection protects, and it is the one the three figures above measure. A designer who checks only the loop’s output will conclude that the hold is enough, and for the output it is.
What a designer should take
In a digitally controlled loop, reject the converter’s images with the converter’s own pulse before reaching for an analogue pole. The pole that does the straight line’s job sits at the loop’s crossover and costs about forty-five degrees of margin; the straight line costs degrees, which for a loop crossing over at a tenth of its clock is eighteen. The straight line is the cheaper filter for any loop crossing over below about a sixth of its clock, which is nearly every digital loop.
The opposite trade applies to the loops that are clocked slowly for reasons of their own — a controller sharing a processor with other tasks, a loop whose sensor is itself sampled slowly. There the half clock is expensive and an analogue pole placed well above the crossover, accepting less rejection, may be the only reasonable choice.
And a general caution the marched loop supplies: a phase estimate of a sampled loop is optimistic about anything that adds delay, by an amount that grows as the crossover approaches a fifth of the clock. What is left at crossover measures a margin by cutting the loop; for a sampled loop, the step is the measurement to believe, and two measurements of one margin is the reason a step and a margin do not always agree.
How the numbers were obtained
The loop is marched in units of clocks. At each clock edge the controller takes the plant’s output and the converter’s next sample is one minus it; the converter’s output inside each clock is the sum of the last one or two samples’ pulses — a rectangle, or a triangle two clocks wide — evaluated only within the clock it belongs to, since the next sample has not been taken. The plant integrates at a gain putting the continuous crossover at of the clock, and when the pole is present it filters the converter’s output first. Everything is integrated by a fourth-order Runge–Kutta rule at 160 steps a clock for at least forty clocks and six loop time constants. The overshoot crossing is bisected on the difference between two marched loops, sixteen iterations. The phase crossing is bisected on the closed forms. The images are read from twenty-clock records of each waveform at 256 points a clock, at whole numbers of periods.
What it leaves out
Any plant but an integrator. A plant with its own pole near the crossover already lags there, and adding either reconstruction pushes it further; the comparison between the two holds, but the crossover at which a loop becomes unusable moves down. A plant with a resonance above the crossover — a mechanical mode — is the case where image rejection matters most and where the analogue pole’s attenuation at the resonance, not at the image, may be what decides.
The controller. A proportional controller with unit gain is the simplest loop with a crossover. A controller with a lead term recovers phase, and would recover it equally for either reconstruction, so the difference of 27 degrees at a tenth of the clock should survive; that is an argument, not a measurement.
Longer pulses. Four rectangles and no filter found the cubic pulse replacing an analogue filter entirely at a few times oversampling. Inside a loop its two clocks cost degrees more than the hold, which at a tenth of the clock is thirty-six, and whether three analogue poles at the crossover or two clocks of pulse is cheaper is the natural next comparison.
Still open: the cubic in a loop, a pole matched on the ratio, and the loop with a resonance
The cubic pulse inside a loop. Four rectangles are worth three poles and cost one and a half clocks more than the hold. Three equal poles at the crossover cost 135 degrees and are unusable; the cubic’s extra lag is . The crossover below which the long pulse is the only workable way to get that rejection into a loop is a line on the same axes.
The pole matched on the image relative to the signal. Matching the pole on the image’s absolute level flattered it by three decibels. Matching it on the image relative to the signal at the crossover moves it lower and costs more phase; the size of that correction is small at a tenth of the clock and grows with , and it would move the marched crossing down again.
A plant with a mechanical resonance. The reason to reject images in a motion loop is usually a structural mode between the crossover and the clock. The analogue pole attenuates the mode as well as the image; the straight line attenuates only near the clock’s multiples. Where the mode is decides which is worth more, and a two-mass plant marched through both reconstructions would draw the answer.
Part 7 on reconstruction
One argument about Reconstruction, and one of 7 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:
The objects named here
The third axis, after the field and the idea: the things themselves, and every essay that touches each one.
Anti imaging filterDesign tradeoffGroup delayLoop gainPhase marginReconstructionZero-order hold
- Flatness, and the two currencies it is bought in design tradeoff, reconstruction, zero-order hold
- The capacitance the bias takes away design tradeoff, loop gain, phase margin
- The capacitor across the upper resistor design tradeoff, loop gain, phase margin
- The floor a second capacitor removes design tradeoff, loop gain, phase margin
- The lead a divider can give design tradeoff, loop gain, phase margin
- The path that buys the error back design tradeoff, loop gain, phase margin