The lead a divider can give

The capacitance the bias takes away found a comfortable answer for a ceramic output capacitor on this five-volt regulator. The part is ten microfarads at zero bias and two at its working voltage, and one capacitor across the upper divider resistor, anywhere from 423 to 808 pF, holds 45 degrees of phase margin at every capacitance in between. The best choice, 649 pF, gives 49.8 degrees at the corner that binds, which is the capacitor at its full value.

Every one of those loops drove five ohms, an ampere at five volts. The essay’s last check was a single solve at fifty ohms, and it did not agree: 37.6 degrees at full capacitance, 29.2 at a fifth, both below the line and in the reverse order. A regulator that is specified from a few milliamps to an ampere spends most of its life at the other end of the load range from where its margin was designed. The question this essay takes up is whether any divider capacitor serves the whole rectangle of load and capacitance, and if none does, what the reason is and what does serve it.

The answer turns out to be a closed form in the divider’s ratio, and it is not a matter of choosing the capacitor better.

The margin falls with the load and the crossover does not move #

The regulator is unchanged from what gets through from the rail and the essays after it: a 1.25 V reference, a 30 kΩ over 10 kΩ divider for five volts out, an error amplifier with its pole at 15.9 Hz, a pass device of one siemens with a kilohm of its own output resistance, and a ceramic of 5 mΩ series resistance. Only the load moves, from an ampere down to five milliamps, drawn through a resistor of five volts over the current.

Every divider capacitor loses margin as the load lightens, and all of them lose it over the same stretch, between a few hundred milliamps and about fifty. Below that the curves flatten. The robust 630 pF goes from 49.7 degrees at an ampere to 36.0 at five milliamps, and the bare loop, which was already poor at 18.0 degrees, falls to 0.1: a loop with no divider capacitor is on the edge of oscillation at light load. The larger capacitor, 1500 pF, which was past its best at an ampere, is also past it at five milliamps. The smaller one, 336 pF, was short of lead at an ampere and is further short at the light end.

The part of the figure worth reading first is the one that does not show: the crossover. Over a load range of two hundred to one it moves from 12.9 kHz to 13.2, two per cent. The phase at that frequency is what changes. So the lighter load is not moving the loop somewhere its lead is in the wrong place, which is what the lost capacitance did in the essay before. It is taking phase away at the same place.

The slider on the figure at the head of this page moves the ceramic’s kept capacitance. At half of it, 630 pF gives 52.8 degrees at an ampere and 35.8 at five milliamps; at a fifth, 51.3 and 27.6. The biased part loses more at light load than the full one, which is the reversal the fifty-ohm check found. At an ampere the full capacitor was the hard case, and at five milliamps the biased one is.

Where the output pole goes #

A load resistance does one thing to this loop: it sits in parallel with the pass device’s own kilohm at the output node, against the output capacitor, and so it sets where that node’s pole falls.

At an ampere the load is five ohms, the parallel combination is 4.98 Ω, and against ten microfarads the output pole is at 3.20 kHz. That is only four times below the 13 kHz crossover, so at the crossover the output pole has taken about seventy-six of its ninety degrees. The fourteen it has not yet taken are phase the loop keeps. At five milliamps the load is a kilohm, the parallel combination five hundred ohms, and the pole falls to 31.8 Hz, more than two and a half decades below the crossover. It has taken all ninety degrees long before the loop needs them.

The crossover does not follow the pole down, and the reason is what a pole is. Above its own pole the pass stage’s gain is its transconductance over the capacitor’s reactance, $g_m/(2\pi f C)$, and the load does not appear in it: at 13 kHz ten microfarads is 1.2 Ω, which is small against five ohms and very small against a kilohm, so the capacitor carries the signal current either way. The loop’s magnitude near the crossover is therefore the same at both loads and so is the crossover. The phase at the crossover is not, and the difference is the fourteen degrees the heavy load’s output pole had not yet spent. The margin falls from 49.7 to 36.0, a difference of 13.6.

That has a consequence the next section makes exact. At a light load both low poles — the amplifier’s at 15.9 Hz and the output’s at 31.8 Hz — are decades below the crossover and each contributes its full ninety degrees. The loop’s own phase at the crossover, before any lead, is as close to −180 degrees as a loop can come without going past it, which is the condition what is left at crossover names as the edge of stability. The bare loop’s margin of 0.1 degrees at five milliamps is that measurement: everything in this regulator except the divider capacitor adds up, at its crossover, to within a tenth of a degree of instability. Whatever margin the light load has is the divider capacitor’s lead, and nothing else.

A ceiling in the divider’s ratio #

A capacitor across the upper divider resistor is a lead pair, and a lead pair’s phase has a maximum that depends only on how far apart its zero and its pole are. The zero is at $1/(2\pi R_1 C_{ff})$, where the capacitor starts to short the upper resistor. The pole is at $1/(2\pi (R_1 \parallel R_2) C_{ff})$, where it has finished, since from then on the feedback node sees the two resistors in parallel. Their ratio is $R_1/(R_1 \parallel R_2) = (R_1 + R_2)/R_2$, which is the divider’s own gain $G$, the ratio of the output to the reference. Whatever capacitor is chosen, the zero and the pole are a factor $G$ apart.

The phase of such a pair is greatest at the geometric mean of the two, and its greatest value is

$$\varphi_{\max} = \arcsin\frac{G - 1}{G + 1}.$$

For five volts from a 1.25 V reference $G = 4$ and the ceiling is 36.87 degrees. The capacitor’s value decides only where on the frequency axis that maximum sits; nothing about the capacitor raises it. And since at a light load the rest of the loop contributes −180 degrees to within a tenth, 36.87 degrees is not only the most the lead can give but very nearly the most margin the light-load loop can have.

The figure tests the claim at three output voltages, keeping the reference and the lower resistor and changing only the upper one. At a divider gain of 2, a 2.5 V output, the best margin at five milliamps is 19.36 degrees against a ceiling of 19.47. At a gain of 4 it is 36.83 against 36.87. At a gain of 9.6, a 12 V output, it is 54.16 against 54.23. Each curve rises to its own ceiling and turns over just beneath it, and the capacitor that reaches the peak falls as the gain rises, from 1277 to 528 pF, because the larger upper resistor puts the lead pair lower for the same capacitance.

Read the other way, the expression says which regulators of this topology can hold 45 degrees at a light load with a bare ceramic and which cannot. Forty-five degrees needs $(G - 1)/(G + 1) \geq \sin 45°$, which is $G \geq 5.83$: an output of at least 7.29 volts from a 1.25 V reference. A twelve-volt rail has room. A five-volt rail is short by eight degrees whatever capacitor is fitted, and a 3.3 V or 1.8 V rail, with a gain of 2.64 or 1.44, has a ceiling of 26.8 or 10.4 degrees. The low-voltage rails, which are where ceramic output capacitors are most common, are exactly where the divider has the least lead to offer. A ceramic at a low bias keeps more of its capacitance than at five volts, where the capacitance that is not one number measured it at a fifth, so on those rails the part that suits the design least is the divider rather than the capacitor.

This is a different kind of limit from the ones the earlier essays met. The resistance floor of two requirements pulling one capacitor and the capacitance band of the essay before this one were both regions in a parameter space, and a better choice of part could move out of them. The lead ceiling is a property of the network’s topology and of the voltage it is asked to produce. The only ways past it are to change the topology, or to find a second source of lead.

No capacitor for the rectangle #

A designer does not get to choose the load. The practical question is the least margin over the whole range the regulator will meet, and the divider capacitor that makes that least margin largest.

The top curve is the essay before this one’s answer, recovered: at an ampere alone the best single capacitor is 649 pF at 49.8 degrees. Each lower curve takes in more of the load range. Down to half an ampere the best falls to 41.8 degrees, already below the line. Down to a hundred milliamps it is 33.8, and down to five milliamps 32.4 degrees at 487 pF. There is no divider capacitor, of any value, that holds 45 degrees over a load range that reaches a tenth of full load.

The corner that binds has moved as well. At an ampere it was the full capacitor. Over the rectangle with the best capacitor fitted, the least margin sits at five milliamps with the full ten microfarads, but the biased capacitor at five milliamps is within a degree of it. At a light load both capacitances meet the same ceiling, and the loss of margin with bias that the essay before measured at an ampere has become a small correction to a limit that was never about the capacitance at all.

A minimum load — a resistor across the output, drawing current that is wasted — is the conventional repair for a regulator that misbehaves when lightly loaded, and the figure prices it. To hold 45 degrees with one divider capacitor the rectangle’s floor has to be above half an ampere, since the half-ampere curve already falls short. A preload of that size on a one-ampere regulator is half the regulator’s rating spent on stability, and it is not a repair anyone would build.

A resistor put back on purpose #

The loop needs a second lead, and there is an obvious one available. The ceramic’s series resistance puts a zero in the output branch at $1/(2\pi R_{esr} C)$, which with five milliohms and ten microfarads is at 3.2 MHz, far above anything the loop reaches. It was exactly that zero, pulled down near the crossover by an electrolytic’s larger resistance, that made the original regulator stable, and it was the loss of it that made the divider capacitor necessary in the floor a second capacitor removes. A resistor in series with the ceramic puts it back.

At the ceramic’s own five milliohms the rectangle’s best is the 32.4 degrees found above. A hundred milliohms raises it only to 35.1: the zero is then at 160 kHz with the full capacitor, still a decade above the crossover. Three hundred milliohms gives 42.1, and the rectangle reaches 45 degrees at 416 mΩ, with 422 pF across the upper resistor. At that resistance the zero is at 38 kHz with ten microfarads and 190 kHz with two, and at the 13 kHz crossover the full capacitor’s zero leads by about nineteen degrees — enough, added to what the divider gives, to clear the line.

The best divider capacitor falls as the resistance rises, from 487 pF to 422 and then 365 at an ohm, because the two leads now share the work and the divider’s can be placed lower. And a whole ohm gives 59.3 degrees over the whole rectangle, which is more margin than the full-load design had at its best.

This is the resistance floor of two requirements pulling one capacitor returning, at about half its old value. That essay needed 939 mΩ with no divider capacitor; here the divider capacitor supplies most of the lead at a heavy load and all of the capacitor’s rated voltage range, and the resistor supplies what the divider cannot at a light one. What changes is who the resistor is for. It is not needed at an ampere at all, and it is the light load, where the divider runs out of lead, that sets its value.

What the resistor costs in droop, and a correction #

A series resistance has a transient price, and the first requirement of the original essay was exactly that price: at the first instant of a load step the capacitor cannot move, and the whole step current falls across the resistance.

At 416 mΩ that first-instant drop is 41.6 mV, the dotted line, and the droop is still smaller than with the bare ceramic: 95.2 mV from a standing load of five milliamps against 113, and 80.6 mV from an ampere against 94.9. The resistor restores the margin and removes about fifteen per cent of the droop, because a loop with 45 degrees undershoots less than one with 32, and the resistor’s own drop is not yet large enough to outweigh that. The droop curves flatten between half an ohm and an ohm and begin to rise again, as the first-instant drop grows to meet the undershoot it replaces, and 416 mΩ sits on the falling side of that turn. For this regulator the stability requirement and the transient requirement do not pull apart at light load. They point the same way.

The figure also contains a correction. Every marched step on this sequence of essays until now drew its standing load from a current source, and a current source has no incremental resistance. The loop being stepped therefore had only the pass device’s kilohm at its output, which is the light-load loop, whatever current the source drew. With the bare ceramic, an ampere drawn from a current source droops 113 mV — exactly the five-milliamp figure — where an ampere drawn through a resistor droops 94.9. The droop figures of the capacitance the bias takes away are therefore light-load droops, correct as droops and mislabelled as full load. Their margins were computed at five ohms and are not affected; their marched steps were a different loop from the one whose margin they were set beside. Every step on this page draws its standing load through a resistor, so each figure is the loop its caption names.

What a designer should take #

For a linear regulator of this topology with a ceramic output capacitor, the margin at light load is capped by the divider: at most $\arcsin((G - 1)/(G + 1))$, with $G$ the output over the reference. Compute it before choosing anything else. If it is below the margin wanted — and for any output below about 7.3 volts from a 1.25 V reference it is below 45 degrees — then no divider capacitor will serve the whole load range, and trying values is wasted effort.

The repair is a deliberate series resistance with the ceramic, of a few hundred milliohms, chosen at the light-load corner rather than the heavy one. Here 416 mΩ with 422 pF across the upper resistor holds 45 degrees from five milliamps to an ampere and over a fivefold loss of capacitance. Check the droop at that resistance against the first instant’s drop; for this regulator it improves.

And check that a transient simulation’s load is the load it claims to be. A current-source load is the light load, always. It is a legitimate test of the light-load loop and a misleading one of any other.

The broader point is that a limit can live in a network’s topology rather than in its values. The lead a divider capacitor makes is fixed by the divider’s ratio, and the ratio is fixed by the voltage the regulator exists to make, so the one thing that cannot be traded is what decides it. The capacitor across the upper resistor found the same element taking a full-load margin to 90.9 degrees with an electrolytic’s resistance beside it. With a ceramic and the load gone it has at most 36.9 to give, and the difference between the two is the output pole and the resistance’s zero, neither of which was ever the capacitor’s.

How the numbers were obtained #

The regulator is the netlist of a source below a frequency, with the output capacitor as a capacitance in series with its resistance and the load as a resistance of five volts over the stated current. The loop is broken at the error amplifier’s input, where breaking it is exact because a transconductance draws no current, and the margin is read at unity return ratio with the crossover bisected in log frequency. The rectangle is seven loads from 5 mA to 1 A by three kept capacitances, and its least margin is taken at each of twenty-five divider capacitors spaced evenly in log from 100 pF to 3.2 nF. The series resistance giving 45 degrees is bisected in log resistance over the divider capacitors near its answer. The droops are marched from the operating point over 4 ms in 6000 steps with the step applied at 0.2 ms, the standing load through a resistor and the step through a current source; the one current-source comparison is marked as such.

The lead ceiling is an identity: the arcsine is where the derivative of $\arctan(\omega/\omega_z) - \arctan(\omega/G\omega_z)$ vanishes, and the three measured peaks lie under it by 0.04 to 0.11 degrees. That the light-load margin reaches it almost exactly is the measurement; that it cannot exceed it is the algebra, and the two are separate facts that happen to agree.

What it leaves out #

The pass device is linear: its transconductance does not change with its current. A real pass transistor’s transconductance falls as its current falls, roughly in proportion for a bipolar device and as the square root for a field-effect one, and that lowers the crossover at light load. A lower crossover moves further from the lead pair’s best frequency but also further from the drive pole, and which effect wins is a property of a specific device. The ceiling itself is not affected, since it is a statement about the divider.

The series resistance is ideal. A real resistor in series with a ceramic has inductance of its own, and at the few hundred kilohertz where the resistance’s zero sits for a biased capacitor, a few nanohenries is a small fraction of an ohm; it would matter above a megahertz. The resistor also dissipates the ripple current, which for a regulator’s output is small.

The error amplifier has one pole. An amplifier with a second pole near the crossover would take phase that the ceiling analysis assumes is not taken, and the light-load margin would then sit below the ceiling by that amount rather than on it.

Still open: the second lead in the divider, the turn-on at light load, and the preload that follows the load #

A second lead pair in the divider itself. A resistor in series with the divider capacitor turns the lead pair into one with a zero, a pole and a second zero-pole pair, and a divider split into three resistors with two capacitors gives two lead pairs in cascade whose ceilings add. Whether either beats a series resistance at the output, which costs a first-instant drop and a part in the high-current path, is a comparison on the same rectangle.

The turn-on, at light load. At turn-on the ceramic sweeps from its full capacitance to a fifth, and at light load the margin is at its ceiling throughout. A marched turn-on with the capacitance following the voltage and the load at five milliamps would say whether the overshoot at the end of the ramp is the one this ceiling predicts, or whether the large-signal slew of the amplifier hides it.

A load-dependent preload. A preload of half an ampere is absurd as a constant. A preload that is drawn only when the load is light, and removed as the load rises, costs its current only when the regulator has current to spare. Whether a crude one — a current sink switched by the pass device’s own drive — holds the margin over the rectangle, and what it does to the droop when it switches, is a question the same solve can answer.