The bias point that heats itself

Every operating point solved so far in these essays has been solved at a temperature someone chose. A bias point is a solution fixed it at 300 K, and the bias the gain does not set held it there while β moved and noted in passing that temperature was the larger effect. Two millivolts a kelvin, and the wrong sign measured what temperature does to a junction on its own: at a fixed current its voltage falls by about 1.8 mV per kelvin, so at a fixed voltage its current rises — by six or seven per cent a kelvin at room temperature, the drop’s slope divided by the thermal voltage.

A transistor carrying current dissipates power, and power raises its temperature. So the temperature is not chosen; it is set by the operating point, and the operating point is set by the temperature. The circuit’s equations and the heat sink’s equation have to be solved together, and like the circuit with three bias points, the combined system can have more than one solution — or none.

One transistor, one sink #

The transistor is the output device of a stage that biases it from a stiff source: its base is held at a fixed voltage through one ohm, as a diode string or a $V_{BE}$ multiplier holds the bases of a push-pull output stage. The collector goes straight to 15 V. The base voltage is chosen so that at 300 K the transistor carries 100 mA, dissipating 1.5 W.

At any junction temperature $T$ the electrical operating point is a Newton solve of the netlist, with the device’s saturation current and thermal voltage evaluated at $T$ — the saturation current rising as $T^3e^{-E_g/kT}$, which is where the two millivolts a kelvin come from. That gives the power $P(T)$ the transistor dissipates if its junction is at $T$. The heat sink removes $(T - T_a)/\theta$, with $T_a$ = 300 K and $\theta$ the thermal resistance from junction to ambient. An operating point is a temperature at which the two are equal.

On a 4 K/W sink there are two crossings. At 311.7 K the transistor carries enough current to dissipate 2.9 W, and the sink removes exactly 2.9 W at that temperature. At 332.5 K the same is true of 8.1 W. Both are solutions of the combined equations. Only one of them is a place the transistor can stay.

Which crossing holds #

A small rise in temperature $\delta T$ at an operating point raises the power by $(dP/dT)\,\delta T$, which raises the temperature further by $\theta\,(dP/dT)\,\delta T$. That product is the thermal loop gain: the temperature change fed back per temperature change made. Below one, a disturbance returns smaller than it left and the point holds; above one, it returns larger and the temperature climbs until something else — the device’s destruction, usually — intervenes.

At the cooler crossing the loop gain is 0.64. At the hotter one it is 1.43. So the cooler point holds, and the hotter point is the boundary of its basin: a transistor pushed above 332.5 K by a transient — a surge of signal, a moment’s loss of airflow — does not come back. That is thermal runaway, and it is stated here as a threshold temperature rather than as a condition, which is what makes it usable.

The picture is the same one the circuit with three bias points drew for a latch, one dimension down: two roots of a nonlinear equation, one with a loop gain below one and one above, and the one above marking the edge of the other’s basin.

The sink that is not good enough #

Drag the thermal resistance up and the dashed line tilts down towards the solid curve. The two crossings approach each other: at 4.4 K/W they are 317.5 K and 322.7 K, with loop gains 0.91 and 1.11. Just above that they touch and vanish.

The fold is at $\theta^*$ = 4.43 K/W and 320 K. At the fold the loop gain is exactly one — the curves are tangent — and on a sink any worse than that the transistor has no operating temperature. It heats until it fails, whatever it is doing electrically, and it does so from switch-on without any disturbance at all. The fold is found by maximising $(T - T_a)/P(T)$ over temperature, which is the largest thermal resistance for which the heat balance has a root.

Notice what the fold’s temperature is: 320 K, twenty kelvin above ambient. The transistor runs away from a junction temperature any data sheet would call cool. A design check that asks “is the junction below its maximum rating at the operating point” would pass this design on a 4.3 K/W sink with a margin of 130 K, and it would be looking at a point one tenth of a kelvin-per-watt from vanishing.

What the emitter resistor does #

The repair is the one the bias the gain does not set found for β: put a resistor in the emitter. A rise in current raises the emitter voltage, which with the base held takes voltage off the junction, which reduces the current. It is negative electrical feedback against the positive thermal feedback, and it divides the current’s sensitivity to temperature by one plus $g_mR_E$ — about 4.9 at a tenth of an ohm and 100 mA.

Two things happen as the resistor grows. The fold moves to a worse sink, which is the expected half. And the fold moves to a higher temperature, which is the half that changes the character of the problem: at a tenth of an ohm the transistor runs away from 356 K, still inside its rating, but at a fifth of an ohm the fold is at 444 K — past the 423 K that most silicon is rated for — so the rating is reached before runaway is. With a quarter of an ohm there is no fold at all: the temperature rises smoothly as the sink worsens and the only limit is the rating.

The reason the fold disappears is visible in the power curve. With no emitter resistor the current grows exponentially with temperature and so does the power, without limit, and any straight line from the ambient point is eventually crossed from below. With an emitter resistor the current’s growth is tamed to a rise the resistor’s own drop limits, and the power grows far more slowly; above a quarter of an ohm here it grows slowly enough that the sink’s line stays ahead of it across the whole range. The resistor does not merely postpone runaway. It can remove it.

The estimate a designer makes, and why it is optimistic #

The textbook stability condition for thermal runaway is the loop gain: $\theta\,dP/dT < 1$. A designer evaluates $dP/dT$ at the design point — room temperature, 100 mA — and gets a maximum thermal resistance of $1/(dP/dT)$. With no emitter resistor that is 11.04 K/W.

The true edge is 4.43 K/W. The estimate is two and a half times too generous, and the reason is that the loop gain is not a constant. At 300 K and 100 mA it is $4 \times 0.0906 = 0.36$ on a 4 K/W sink; by 311.7 K, where that sink actually holds the transistor, the current has nearly doubled and the loop gain is 0.64; at the fold it is one. The condition $\theta\,dP/dT < 1$ is right, but it has to hold at the operating temperature, and the operating temperature depends on $\theta$. Evaluated at the design point it answers a question about a transistor that is not warm yet.

That is a general shape and worth naming: a stability condition evaluated at the unperturbed point, for a system whose feedback strengthens as it moves. The loss that depends on what it causes meets it for a magnetic core whose loss rises with the temperature the loss produces, and the loop gain one temperature understates is the same understatement measured there. The repair is the same in both: solve the fixed point and find its fold, rather than linearising at the start.

Why the base must be stiff for this to happen #

The runaway here depends on the base being held at a fixed voltage. If instead the base current were fixed — a single resistor from a high supply, the circuit the bias the gain does not set found hands everything to β — the collector current would follow β’s temperature coefficient, a fraction of a per cent a kelvin, rather than the junction’s exponential, which for this transistor at 100 mA is 6.2 per cent a kelvin. A fixed-current base is thermally stable and electrically terrible; a fixed-voltage base is electrically precise and thermally dangerous.

The output stages that run away are precisely the ones biased from a voltage — a diode string or a $V_{BE}$ multiplier — because those are the arrangements that set a small quiescent current accurately. The standard remedy is the one drawn: emitter resistors of a few tenths of an ohm, sized from exactly this fold rather than from the electrical design, together with a bias voltage that tracks the output transistors’ temperature by being mounted on their heat sink, so that the voltage falls as they warm and the loop gain is cut at its source.

The margin is in kelvin per watt, not in kelvin #

A design review usually asks for thermal margin as a temperature: how far the junction sits below its rated maximum. The fold says that question is the wrong one for a voltage-driven junction, and it says how wrong.

On a 4 K/W sink the transistor holds at 311.7 K, which is 111 K below a 423 K rating — a margin nobody would query. The sink it is on is ten per cent better than the one on which it has no operating point at all. So the design’s real margin is ten per cent of its thermal resistance, and that is what a dusty fin, a slower fan or a thinner layer of thermal compound consumes. A temperature margin of 111 K and a thermal-resistance margin of ten per cent describe the same design, and only the second is about the thing that can fail.

The same arithmetic applies to the ambient temperature, qualitatively and in the dangerous direction. A higher ambient starts the junction warmer at the same base voltage, so it carries more current and dissipates more, and the power curve rises and steepens at the point where the sink’s line begins; the fold should move to a better sink as the room warms. That is inferred from the shape of the curves, not solved here — every figure on this page fixes the ambient at 300 K — and it is the direction that makes a margin measured on a cool bench optimistic in a warm cabinet.

Why a current-driven junction cannot run away #

The sign of the loop gain is decided by what the base is held at, and the opposite arrangement makes the point by contrast. The sensor inside its own answer drives a junction from a current source and reads its voltage as a thermometer: there the current is fixed, the voltage falls as the junction warms, the dissipation falls with it, and the thermal loop gain is negative. A current-driven junction cannot run away; its self-heating costs accuracy — a thermometer a few kelvin warmer than what it measures — and never stability.

A voltage-driven junction is the mirror image. The voltage is fixed, the current rises as the junction warms, the dissipation rises with it, and the loop gain is positive and grows with temperature. The emitter resistor sits between the two cases: it turns a fixed base voltage into something partway to a fixed emitter current, and how far partway is $g_mR_E$. At a quarter of an ohm here the arrangement is current-driven enough that its loop gain never reaches one below 520 K, which is the table’s last row read as a statement about topology.

Two devices on one sink #

The fold is for one transistor on its own sink, and a real sink is shared. Two loops and one heatsink finds what sharing does to a pair of devices with two different positive temperature loops: each one’s heat raises the other’s temperature, so the combined loop gain is larger than either alone and the pair gives out before either would separately. The fold here is therefore an upper bound on the thermal resistance a shared sink can have. A push-pull stage’s two output devices, each drawn above with its own θ, are one such pair — and its quiescent current flows through both at once.

How the heat balance was solved #

At every temperature on a half-kelvin grid from 300 to 520 K, the electrical operating point is a Newton solve of the netlist, with the saturation current scaled by $(T/T_0)^3 e^{(E_g/k)(1/T_0 - 1/T)}$ and the thermal voltage by $T$. Each solve closes Kirchhoff’s current law to better than a part in 10⁹, and the design current is required to be 100 mA at 300 K to a part in a million.

The operating temperatures are the roots of $T_a + \theta P(T) - T$, located by sign changes on the grid and refined by interpolation, with the thermal loop gain read from the slope of $P$ between the grid points either side.

The fold is the maximum of $(T - T_a)/P(T)$, which is the largest thermal resistance with a root; it is reported only when the maximum lies inside the grid, and “none below 520 K” otherwise.

The two branches are required to behave as the loop gain says: below the fold the cooler solution must have a loop gain below one and the hotter one above, and the emitter resistor must raise the fold. The room-temperature estimate is required to be optimistic wherever there is a fold.

One device, one thermal resistance, one β #

β is held at 100. Real current gain rises with temperature, which at a stiff base changes almost nothing — the base current is not what sets the collector current here — but it would matter for any design with a softer base.

The thermal resistance is one number. A real transistor on a sink has a junction-to-case resistance and a sink-to-air resistance with thermal capacitance between them, and the fold is a static result: how fast the runaway proceeds, and whether a brief overload can cross the unstable point before the sink responds, needs the thermal network in time.

And the transistor is one device. An output stage has several in parallel, and the hottest one takes the most current and heats fastest — current hogging, a runaway among the devices rather than of any one, which the emitter resistors are also there to prevent.

Still open: the tracking bias, the thermal mass, and the parallel pair #

A bias voltage on the same heat sink. A $V_{BE}$ multiplier mounted with the output devices lowers its voltage as they warm, reducing the drive by about two millivolts a kelvin times the multiplier’s ratio. That subtracts directly from the loop gain, and there is a coupling — a thermal resistance between the sensor and the junctions — beyond which the tracking is too late to help. Solving the fold with the tracking in it would give that coupling as a number.

The transient across the unstable point. A brief overload lifts the junction towards the hotter crossing, and whether it crosses depends on the pulse’s energy against the thermal capacitance. The boundary that is a starting point marches exactly that separatrix for a wound part; for the transistor the critical energy would turn the static threshold into a surge rating.

Two transistors sharing a load. With two devices in parallel and a small mismatch in their saturation currents, the warmer one takes more current and gets warmer. The fixed point then has a symmetric solution and asymmetric ones, and the emitter resistor that removes the single device’s fold may or may not remove the pair’s — the latch’s fork, in thermal form.