The peak a load step does not see

The pair that is worse than either found the defining defect of a decoupling bank: a bulk capacitor and a ceramic, each fitted because it is good where the other is not, make between them a parallel resonance whose impedance is six times either part’s alone. The essay measured the peak’s height as one over the series resistance, found the two capacitors exchanging 5.87 amperes for every ampere the load draws, and found the cure — a third capacitor bought for its resistance rather than in spite of it. The capacitor that is not where the load is and the floor and the ceiling move apart added the copper and found the bank and the load disagreeing about the same solve.

All three essays read the bank the way a power-integrity specification does: as an impedance against frequency, held under a target line. That reading has a hidden assumption. An impedance is the voltage per ampere of a current that has been flowing at one frequency long enough for everything to settle. A processor’s supply current does not do that. It steps — a core waking, a bus turning round — and a step is every frequency at once, for an instant. Whether a step sees the anti-resonance’s peak is a question the impedance plot cannot answer, because it is a question about time.

The bank, given something to stand on #

The pair is the earlier essays’ own: 10 µF of bulk capacitance with 5 mΩ and 5 nH, 100 nF of ceramic with 30 mΩ and 1 nH. A capacitor bank alone has no direct-current path, so a step of load current into it would charge it without limit; a real bank stands on a regulator, which holds the average. Here the regulator is 2 mΩ of output resistance in series with 20 nH — its own loop’s limited bandwidth and the copper to it, as a single element. That adds a second, low-frequency anti-resonance, between the regulator’s inductance and the bulk capacitor near 316 kHz, beside the 7.12 MHz one between the bulk part’s inductance and the ceramic. Its peak is 0.232 Ω, a quarter of the high one, on a characteristic impedance of $\sqrt{20\,\text{nH}/10\,\mu\text{F}} = 45$ mΩ; and once both rings have died, a one-ampere load leaves the supply 2 mV down, the regulator’s resistance times the ampere, which is all the impedance plot says about direct current.

The load is a current source at the bank’s node. Its step response is computed the way every transient in these essays is: the netlist’s transfer function, from the load current to the bank’s voltage, recovered as a ratio of polynomials, its poles found, and the response to a unit step written as a sum of exponentials, one per pole. Loads more complicated than a step — a ramp, a burst — are built by superposing shifted steps.

A step sees the characteristic impedance #

The step rings at 7.12 MHz, as it must: the anti-resonance is the network’s most lightly damped mode at high frequency, and a step excites every mode. But the largest excursion is 132 mV, at 31 ns — a quarter of the 140 ns period — and the impedance peak would have predicted 966.

The reason is in what a peak of impedance is. At the anti-resonance the bulk part’s inductance and the ceramic exchange energy, and a current at that frequency, sustained, pumps that exchange cycle after cycle until the loss per cycle balances the energy put in. The voltage then is the current times the resonance’s characteristic impedance $\sqrt{L/C}$, times its quality factor: $|Z|_{max} \approx Q\sqrt{L/C}$. A step puts energy in once. Its first swing is of the order of the current times $\sqrt{L/C}$ — 0.224 Ω here, of which the step reaches 59 per cent, the rest absorbed by the ceramic’s resistance and the regulator’s path — and it decays from there. The factor of $Q$, about four for this pair, is the number of cycles a sustained current needs to accumulate, and a step has had none of them.

Resonance, and the bandwidth it sets exactly measured the same distinction from the other side: a resonator’s peak is $Q$ times its off-peak response, over a bandwidth of $f_0/Q$. A step’s energy at the resonance is spread over every frequency, and only the share in that bandwidth is amplified — which is why it does not see the peak.

The load the peak describes #

The peak is not imaginary, and the figure shows the load that finds it: the same one-ampere current, switched on and off in step with the resonance. A square wave’s fundamental is $2/\pi$ of its peak-to-peak amplitude, and the steady-state voltage it produces is that times the impedance there — $0.637 \times 0.966 = 615$ mV. The first cycle swings ±178 mV, about a single step’s size. Each later edge arrives as the previous ring is swinging the same way, adds to it, and the swing builds to ±611 mV, 3.4 times the first cycle’s.

The build-up has a shape worth noticing in the figure: the envelope rises fastest in the first few cycles and flattens, the same exponential approach a tuned circuit makes when it is switched on at its own frequency, with the same time constant as the decay after a single step. The two are one property of the network read forwards and backwards — how long a ring lasts is how long it takes to build one.

That is a real hazard, and a familiar one: a processor executing a loop whose period happens to match the supply’s anti-resonance — a power virus, in the jargon of the people who test for it — drives the supply to the peak. But it is a load with a frequency in it, sustained for many cycles, and it is the only kind of load the impedance plot describes.

How many cycles the peak needs #

The swing fills like any resonator being pumped. Each edge adds a ring of the step’s size; between edges the existing ring decays at the rate the resonance’s damping sets; and the swing approaches its steady state geometrically, at a rate fixed by the quality factor. For this pair, whose peak is 4.3 times its characteristic impedance, the last cycle of a burst swings 204 mV after one cycle, 505 after four, 570 after six — within ten per cent of the peak’s prediction — and 611 after sixteen.

So the peak is a property of loads that persist at the resonance for something like $Q$ cycles, and a load whose activity at 7.12 MHz lasts two or three cycles sees perhaps half of it. A specification that holds a bank under a target impedance at its anti-resonance is guarding against the persistent load. Whether it also guards against the load the system actually has depends on how long that load can sustain the frequency, which is a question about the software rather than about the capacitors.

Damping cures the peak and not the step #

The standard cure for an anti-resonance is loss: the pair that is worse than either found the peak’s height to be one over the series resistance, and a damping capacitor with a deliberate resistance takes most of it away. The cure works on the number it was designed against.

Scaling both parts’ resistance from half to eight times the data-sheet value takes the impedance peak from 1.907 Ω to 0.213 — nearly in proportion, since the peak is a $Q$ and resistance sets a $Q$. The step’s swing goes from 137 mV to 120 and back up to 155. It hardly moves, because the first quarter period of a ring is set by the resonance’s characteristic impedance, which resistance does not change; and at the heaviest damping the parts’ resistance itself, now a quarter of an ohm in the ceramic, begins to appear in the step directly.

The consequence for design is a split in what a specification should say. A bank damped to put its anti-resonance under a target impedance is protected against a load that sits at that frequency. Its response to a single step is set by $\sqrt{L/C}$ of the resonance — the bulk part’s inductance against the ceramic’s capacitance — and the only ways to lower that are less inductance or more capacitance. Damping, which costs nothing in parts and is the usual advice, buys nothing for a step.

The edge decides #

If the peak does not set a step’s swing, the step’s own speed does.

A load change faster than a few nanoseconds is a step as far as the bank is concerned: 132 mV, flat, for edges from a tenth of a nanosecond to about five. Slower edges ring the resonance less, because a ramp spread over a time comparable with the resonance’s period puts less of its energy at that frequency: 80 mV for an edge of 75 ns, about half the period, and 28 mV for a microsecond, where what remains is the slope of the current across the bank’s and the regulator’s inductance and the regulator’s resistance.

That is the parameter a designer can often control and a specification rarely mentions. A load whose current is made to change over tens of nanoseconds — by staggering the turn-on of its blocks, which processors do — rings its supply far less than the same change made at once, by a factor the impedance plot cannot show and this figure can. The load that rises slower than the loop found the same lever one level up: a regulator’s droop ordering reverses when the load’s rise time meets the loop’s bandwidth. The decoupling bank has its own version, at the anti-resonance rather than at the loop’s crossover.

What does lower a step’s swing #

If damping does not help a step, the characteristic impedance says what does. For the high-frequency anti-resonance it is $\sqrt{L/C}$ with $L$ the bulk part’s inductance — plus whatever copper is in series with it — and $C$ the ceramic capacitance in parallel. Halving the inductance lowers it by $\sqrt 2$; doubling the ceramic capacitance does the same. A bank of four ceramics in place of one has twice the characteristic impedance’s denominator under the root, and so, by the same reasoning, about half the first swing for a fast step — while its anti-resonance moves down in frequency by half and its peak, at the same per-part resistance, need not fall at all. The floor and the ceiling move apart found adding parts improving the bank’s floor and ceiling at different rates; for a step the relevant figure of merit is a third one, the inductance-to-capacitance ratio at each anti-resonance, and adding ceramics improves it as the square root of their number.

That reorders the usual advice. To pass a target impedance, a designer damps; to survive a step, a designer adds capacitance close to the load and removes inductance between the bulk part and the ceramics. The two prescriptions agree in one place — less inductance helps both — and disagree in another: damping, which costs a part or a resistor and is cheap, buys nothing for a step, and more ceramic capacitance, which is what a step needs, can deepen the peak a target-impedance check is looking at.

Measuring the two on a bench #

The two readings are also two measurements, and a bench can make both. An impedance analyser, injecting a small sinusoid and sweeping it, reads the plot of the earlier essays — the peak included, because the analyser dwells at each frequency long enough for the resonance to fill. A load-step tester — a transistor switching a resistor across the supply — reads this essay’s waveform. The two can disagree about the same board by the resonance’s $Q$, and both are right.

The step measurement has its own trap, and it is a probe’s. The ring the ground lead adds found a probe with a fifteen-centimetre ground lead ringing at 121 MHz on any node stiffer than 228 Ω, damped only by the node’s own resistance. A supply node is a fraction of an ohm, so a clip-lead probe on it rings almost undamped at its own resonance, far above the 7.12 MHz the bank rings at. The two rings are easy to tell apart by frequency, but the probe’s sits on top of every edge and its first swing can be larger than the bank’s. A supply’s step response is measured with the probe’s ground spring pressed to the plane beside the measurement point, or not at all.

Two readings of one network #

None of this contradicts the impedance plot; it reads it correctly. The plot is the response to every frequency held forever. A step is all frequencies for an instant, and the voltage it produces is the inverse transform of the impedance times the step’s spectrum — dominated, near the anti-resonance, by the narrow peak’s area rather than its height, and the area of a resonance’s peak is fixed by $\sqrt{L/C}$ whatever the $Q$. A high, narrow peak and a low, wide one of the same characteristic impedance give nearly the same step; they give very different sustained responses. The target-impedance method guards against the sustained one and is therefore conservative for steps by about the resonance’s $Q$ — conservative, but in a way that spends a designer’s effort on damping, which helps the case the method guards against and not the case a step is.

Five readings of one Q found a resonator’s quality factor coming out differently from different measurements because each asks a different question. A power distribution network has the same multiplicity: its impedance peak, its step response and its burst response are three measurements of one network, and they weigh its quality factor as $Q$, as one, and as something between, according to how long the load stays.

The numbers #

The bulk-and-ceramic pair on a 2 mΩ, 20 nH regulator presents 0.966 Ω at its 7.12 MHz anti-resonance. A one-ampere load step moves its supply by 132 mV, 31 ns after the step, 59 per cent of $\sqrt{L/C}$ = 0.224 Ω and 14 per cent of the peak. Switched at 7.12 MHz, the same load builds over six cycles to within ten per cent of ±615 mV, the peak times the square wave’s fundamental. Sixteen times the ESR cuts the peak from 1.907 Ω to 0.213 and leaves a step’s swing between 120 and 155 mV. An edge faster than a few nanoseconds gives 132 mV, one of 75 ns 80 mV, one of a microsecond 28 mV.

Still open: a load with a spectrum, the copper’s own step, and the regulator’s resonance #

A load with a realistic spectrum. Real supply currents are neither steps nor square waves but bursts of activity with a spectrum of their own. The worst swing a bank sees from a load of stated spectral density — the convolution of the load’s spectrum with the impedance, read in time — is the quantity a target impedance stands in for, and it would say how conservative the target is for a load that is neither of the two extremes here.

The step at the load, behind copper. The capacitor that is not where the load is found the bank’s node and the load’s node disagreeing by a factor of 94 about the same impedance. The step response at the load, behind the plane’s inductance, should ring at a different frequency and with a different first swing; whether the step sees the plane’s $\sqrt{L/C}$ or the bank’s is the comparison that would say where a step’s droop is decided.

The regulator’s own anti-resonance. The 316 kHz resonance between the regulator’s inductance and the bulk capacitor is excited by a step too, more slowly and for longer. Whether its swing, a microsecond later, is ever larger than the high-frequency ring — and so whether a slow load step’s droop belongs to the regulator rather than to the bank — is the measurement a source below a frequency began for the regulator alone.