Circuits that do a job, and the range they do it over

The load that rises slower than the loop

Every droop a regulator is sized against is a load step with an infinitely fast edge, and a ceramic regulator droops 103 millivolts on its full 10 µF and 203 on a fifth of it. Give the same 100 mA a rise time and the ordering does not survive: past 23 microseconds the full capacitor droops more than the fifth, and a slow ramp's droop is the loop's own 25.2 µH times the load's rate of change — a number with no capacitance in it, raised 18 per cent on the full capacitor by the impedance peak its slower loop leaves. For a 10 mV budget the load must take 298 µs to arrive on the full capacitor and 253 on the fifth.

Assumes: A source below a frequency · One step, computed twice

Every droop measured on this regulator so far has been the answer to one question: a hundred milliamps of extra load arriving in no time at all. Two requirements pulling one capacitor used it to show that the output capacitor’s series resistance pulls stability and transient response in opposite directions, and the capacitance the bias takes away used it to price the capacitance a ceramic loses at its working voltage: 103 millivolts at the full ten microfarads, 202 at a fifth.

An instantaneous step is the right test for one reason and the wrong one for another. It is right because its spectrum reaches every frequency, so it finds the worst of the regulator’s output impedance wherever that worst sits. It is wrong because no load does it. A processor waking, a motor starting, a relay closing — each draws its current over a rise time of its own, and a load whose current rises over tens or hundreds of microseconds puts very little of its energy at the tens of kilohertz where this regulator’s loop crosses over. Three of the essays before this one closed by asking what a load that is not a step does to the droop, and whether there is a rise time at which the capacitance stops mattering because the loop keeps up.

There is, and the capacitance does more than stop helping. Past it, the capacitor that was best against a step is the worst.

The droop of the ceramic regulator against the rise time of a 100 mA load, with the capacitor at full value, half and a fifth. computed by solving, not by drawing, marched from the operating point: 10 µF, 5 mΩ of series resistance, 630 pF across the upper divider resistor, the 100 mA arriving as a straight ramp. A step droops 103 mV at 100%, 137 mV at 50%, 203 mV at 20% of the capacitance. A ramp of a millisecond droops 2.98 mV, 2.56 mV, 2.56 mV, and the slowest ramps approach the loop's inductance, 25.2 µH, times the ramp's rate (dashed) — a quantity with no capacitance in it — times 1.18, 1.03, 1.03, the share the loop's ringing adds. The full-value and fifth-value curves cross at 23 µs; slower than that, the larger capacitor droops more.
Fig. 1 The droop of the ceramic regulator against the rise time of a 100 mA load, with the capacitor at its full 10 µF, at half and at a fifth. A step droops 103, 137 and 203 mV. A ramp of a millisecond droops 2.98, 2.56 and 2.56 mV, and slow ramps approach the loop’s own 25.2 µH times the load’s rate of change, raised by 1.18 on the full capacitor and 1.03 on the others. The full and fifth-value curves cross at 23 µs; for slower loads the larger capacitor droops more.

The regulator, and the load given a rise time

The circuit is the one the ceramic essays settled on: the same series-pass loop with five milliohms of series resistance in a ten-microfarad ceramic, 630 picofarads across the upper divider resistor — the capacitor the capacitor across the upper resistor introduced and the floor a second capacitor removes made the series resistance’s floor disappear with — to hold the margin above 45 degrees as the ceramic’s capacitance falls, and the standing ampere drawn from a current source. The three capacitances drawn — 10, 5 and 2 microfarads — are the full value and two points down the bias curve that the capacitance that is not one number measured, and the loop crosses over at 12.9, 20.9 and 37.5 kilohertz with margins of 49.7, 52.8 and 51.3 degrees.

The only change is the load. Instead of jumping by a hundred milliamps at one instant, it rises in a straight ramp over a stated time, from a microsecond to two milliseconds, and the circuit is marched from its operating point through the ramp and two milliseconds past it, with a time step no longer than half a microsecond or a fortieth of the ramp. The droop is the deepest the output goes below where it started. A straight ramp is the simplest shape with a rise time, and it is the one whose arithmetic is cleanest: its current has a constant derivative while it lasts, which is exactly what an inductance responds to.

Three regimes in one curve

The hero figure has three parts. At the left, ramps faster than a few microseconds droop exactly as a step does — 103, 137 and 203 millivolts — because a load that arrives faster than the loop can respond is indistinguishable from a step to the loop. At the right, the curves fall as the inverse of the rise time, a slope of minus one on these axes, and lie almost on top of one another. Between them, across a decade either side of twenty microseconds, the fast-side ordering turns over: the full capacitor’s curve falls more slowly than the fifth’s and crosses it at 23 microseconds.

The right-hand regime is the one that answers the question these essays left open, and its answer is that the capacitance has stopped mattering at all. A ramp of a millisecond droops 2.98 millivolts on the full capacitor and 2.56 on both the others, against step droops in a ratio of two. The slow load does not see the capacitor. It sees something else, and the dashed line says what.

What a slow load sees

A source below a frequency measured this regulator’s output impedance and found it rising from a fraction of a milliohm at twenty decibels a decade — the impedance of an inductance, which is what a feedback loop whose gain falls at twenty decibels a decade makes of a source. That inductance is a property of the loop and not of the capacitor.

The ceramic regulator's output impedance with the capacitor at full value, half and a fifth. computed by solving, not by drawing: a test current into the output, the loop closed, the standing load a current source. Below about a kilohertz the three curves are one line, the loop's inductance of 25.2 µH (dashed). They part near the crossover: the full capacitor peaks at 1.99 Ω near 12.5 kHz, the half at 2.40 Ω near 20.2 kHz, the fifth at 4.24 Ω near 39.7 kHz. A load whose spectrum stops below ten kilohertz meets the full capacitor's peak and not the fifth's, which is the whole of why the order of the droops turns over.
Fig. 2 The ceramic regulator’s output impedance with the capacitor at full value, half and a fifth, the loop closed and the standing load a current source. Below about a kilohertz the three curves are one line, an inductance of 25.2 µH. They part near the crossover: the full capacitor peaks at 1.99 Ω near 12.5 kHz, the half at 2.40 Ω near 20.2 kHz, the fifth at 4.24 Ω near 39.7 kHz.

Below a kilohertz the three impedance curves are a single line, and the line is 25.2 microhenries. The capacitor’s own impedance is far larger than the loop’s at those frequencies, so the loop holds the output and the capacitor carries nothing; the loop gain at a given frequency is set by the error amplifier’s pole and gain, which none of the three capacitances moves. Near the crossover the three part, because there the capacitor takes the load from the loop, and a smaller capacitor takes it at a higher frequency and a higher impedance. The full capacitor peaks at 1.99 ohms near 12.5 kilohertz, the half at 2.40 ohms near 20.2, the fifth at 4.24 ohms near 39.7.

A step’s spectrum reaches all three peaks with equal weight, so the step droop follows the peaks and the fifth is worst. A ramp’s spectrum falls off above about 1/πtr1/\pi t_r — near fourteen kilohertz for a ramp of 23 microseconds — and at that point it reaches the full capacitor’s peak, at 12.5 kilohertz, while the fifth’s peak at 39.7 is out of its reach. A load slower than that meets the larger capacitor’s impedance and not the smaller one’s. That is the whole of the reversal: the droop is the output impedance read at the frequencies the load contains, and the capacitor that was best at the frequencies a step contains is worst at the ones a slow ramp does.

How a ramp filters a step

The spectral reading can be made exact, because a straight ramp is a step passed through a filter. A ramp of duration trt_r is the average of a step over a window of trt_r, and an average over a window is a filter whose magnitude is ∣sin⁡(πftr)/(πftr)∣|\sin(\pi f t_r)/(\pi f t_r)|: one at low frequencies, falling through a half near 0.6/tr0.6/t_r, and nothing at 1/tr1/t_r and its multiples. The filter an average is measured exactly that response for a mean taken over a window, and a ramping load is the same mean applied to the load’s current instead of to a reading.

So the droop against any ramp is the step’s droop with the regulator’s output impedance multiplied by that window first. At 23 microseconds the window passes 0.87 of the step at 12.5 kilohertz, where the full capacitor’s impedance peaks, and 0.09 at 39.7 kilohertz, where the fifth’s does. The fifth’s worst frequencies have been filtered to a tenth while the full capacitor’s are nearly untouched, and every slower ramp shifts that balance further. The reversal is gradual for the same reason: the window’s skirt slides down through the three peaks one after another, rather than cutting them at one instant.

The same reading explains why the slow regime has no capacitance in it. Once the window’s half-amplitude point is below a few kilohertz — for a ramp of a couple of hundred microseconds — everything above the frequencies where the three impedances agree has been removed, and the droop is computed from the part of the impedance curve that is one line. The hump on the full capacitor is the last thing to go, since it sits lowest, and it never goes at all. A ramp starts at a corner, and a corner in the current is a step in its rate of change; the loop answers a step in the rate with its own step response, overshoot included, and that overshoot does not depend on how large the rate is. That is why the eighteen per cent survives at every rise time rather than fading as the ramp slows.

The rate of change, and the inductance it multiplies

For a load slow enough to sit below every peak, the droop is the inductance times the load’s rate of change, L ΔI/trL\,\Delta I/t_r, and the marched ramps can be read back as an inductance by inverting that.

The inductance a ramp reads: droop times rise time over the step, against the rise time. computed by solving, not by drawing, from the same marched ramps. For a fast load the product grows with the rise time, because the droop is pinned at the step's; for a slow one it settles, at 29.8 µH for 100%, 26.0 µH for 50%, 26.0 µH for 20% of the capacitance, against the loop's own 25.2 µH from the output impedance at 100 Hz. The excess, ×1.18, ×1.03, ×1.03, is the loop's ringing: the full capacitor's impedance rises to 1.18 times the inductance line before it falls, the others to 1.00 and 1.00. It settles to within ten per cent from 50 µs at 100%, 30 µs at 50%, 50 µs at 20%.
Fig. 3 Droop times rise time over the step, against the rise time, from the same marched ramps. For fast loads it grows with the rise time; for slow ones it settles, at 29.8 µH on the full capacitor and 26.0 µH on the half and the fifth, against the loop’s own 25.2 µH. The excess is the loop’s ringing: the full capacitor’s impedance rises to 1.18 times the inductance line before it falls, the others not at all. It settles within ten per cent from 50 µs.

The product settles, and it settles at the loop’s inductance with one correction. On the half and fifth capacitors it reads 26.0 microhenries, three per cent above the 25.2 the impedance gives at a hundred hertz. On the full capacitor it reads 29.8, eighteen per cent above. The impedance figure says where the eighteen per cent comes from: the full capacitor’s curve rises above the inductance line before the capacitor takes over, to 1.18 times it at the top, while the other two never rise above it at all. In the time domain that rise is ringing — a ramp response of a loop whose impedance has a hump overshoots the steady lag by the hump’s height — and its factor is the same 1.18 from either side.

So the full answer for a slow load is the loop’s inductance times the rate of change, times a factor the loop’s ringing sets, and the capacitance enters only through that factor. The three margins — 49.7, 52.8 and 51.3 degrees — differ by three degrees and do not order the humps, so the factor cannot be read off the margin. It is read off the impedance curve, which is the measurement a designer facing slow loads should ask for.

The rise times needed to reach the settled reading are short. Fifty microseconds on the full and fifth capacitors, thirty on the half, put the reading within ten per cent of where it ends. A load rising over a hundred microseconds or more is therefore a load this regulator meets entirely through its loop, and a regulator designer budgeting such a load against the output capacitor is budgeting against the wrong part.

What the ramp looks like while it happens

The traces show the two regimes as shapes rather than numbers.

The ceramic regulator's output as 100 mA arrives at once, over 10 µs, 30 µs and 100 µs. computed by solving, not by drawing, marched from the operating point with the capacitor at its full 10 µF. The step droops 103 mV, reaching its trough 18.5 µs after the edge; over 10 µs, 101 mV at 23.3 µs; over 30 µs, 84.2 mV at 35.4 µs; over 100 µs, 29.8 mV at 48.5 µs. The fast loads ring through one dip set by the capacitor and the crossover; the slowest one sags while the current is still rising and holds near the loop's inductance times its rate, 25.2 mV.
Fig. 4 The output with the capacitor at its full 10 µF as 100 mA arrives at once, over 10 µs, over 30 µs and over 100 µs. The step droops 103 mV, its trough 18.5 µs after the edge; over 10 µs, 101 mV at 23.3 µs; over 30 µs, 84.2 mV at 35.4 µs; over 100 µs, 29.8 mV at 48.5 µs, near the loop’s inductance times its rate.

The step and the ten-microsecond ramp produce nearly the same dip: one trough, a little later for the ramp, set by how far the capacitor discharges before the loop catches it. That is the shape the capacitance the bias takes away estimated as the step current over the capacitor’s reactance at the crossover, and a load that is over within a quarter of a loop period is still that shape. The thirty-microsecond ramp has begun to change it: the trough is shallower and later, because by the time the load has fully arrived the loop is already supplying most of it.

The hundred-microsecond ramp is a different event. The output sags while the current is still rising, levels off at a depth the rate of change sets, and recovers when the ramp ends. There is no capacitor discharge in it at all; the loop is supplying every microamp as it is demanded and falling behind by a fixed voltage that its finite gain at the ramp’s own frequencies requires. That fixed voltage is the inductance times the rate, and the 29.8 millivolts is the 25.2 the inductance gives times the full capacitor’s ringing factor.

The rise time a budget asks for

Inverted, the droop curves answer a designer’s question directly: for a stated droop, how slowly must the load arrive?

The rise time a 100 mA load must have to keep the ceramic regulator's droop inside a budget. computed by solving, not by drawing: the marched droop curves inverted. For 150 mV: any step at 100%, any step at 50%, 12 µs at 20%; for 100 mV: 11 µs at 100%, 23 µs at 50%, 20 µs at 20%; for 50 mV: 60 µs at 100%, 51 µs at 50%, 48 µs at 20%; for 20 mV: 149 µs at 100%, 128 µs at 50%, 126 µs at 20%; for 10 mV: 298 µs at 100%, 255 µs at 50%, 253 µs at 20%; for 5 mV: 595 µs at 100%, 511 µs at 50%, 508 µs at 20%. A budget above the step's own droop is met by any load on that capacitor; at 50 mV and below the three answers lie within about a quarter of one another, and the full capacitor's is the slowest. For tight budgets the answer is the loop's inductance times the step over the budget, 252 µs for 10 mV (dashed), raised by the loop's ringing to 298 µs on the full capacitor.
Fig. 5 The rise time a 100 mA load must have to keep the droop inside a budget. For 150 mV any step will do on the full and half capacitors and 12 µs is needed on the fifth; for 100 mV, 11, 23 and 20 µs; for 50 mV, 60, 51 and 48 µs; for 10 mV, 298, 255 and 253 µs. At 50 mV and below the answers lie within about a quarter of one another, and the full capacitor’s is the slowest.

The figure has two halves. Above the step droop of a given capacitor, any load is fine on it: the full ten microfarads meets 150 millivolts and the fifth does not, so a generous budget is a statement about the capacitor. Below fifty millivolts the three curves bundle together and follow the dashed line, which is the inductance alone: the step over the budget times 25.2 microhenries, 252 microseconds for ten millivolts, raised by the ringing to 298 on the full capacitor. A tight budget is a statement about the loop.

That is the practical content. The output capacitor buys protection against fast loads, and the protection ends at about a quarter of a loop period. A load slower than that is met by the loop’s gain at the load’s frequencies, and the only things that reduce its droop are a faster loop — more gain at every frequency below crossover, which lowers the inductance — or a slower load. Adding capacitance does nothing to a slow load’s droop and can make it worse, because a larger capacitor brings the crossover down and leaves a hump in the impedance where the slow load can find it.

Where the earlier rules sit

The step droop is still the right number for the loads it describes, and the series-resistance window of two requirements pulling one capacitor is still the right analysis of them. What changes is the range of loads to which that analysis applies. For this regulator it is loads that change faster than about twenty microseconds. A load specification that quotes a current step without a rise time is underspecified by exactly the information that decides which half of the hero figure it lives in.

The ceramic essays’ central finding — that losing four-fifths of the capacitance to bias doubles the step droop — is likewise a finding about fast loads. For loads above fifty microseconds the lost capacitance costs nothing, and the lead a divider can give’s light-load ceiling on the margin matters only through the hump it leaves in the impedance. A designer whose loads are slow can choose the smallest ceramic the margin allows and lose no droop at all, which is the opposite of the advice the step droop gives.

Two routes to the slow number

The slow-ramp droop has been reached two ways here, and they share only the netlist. One is the march: a ramp of a millisecond, stepped in half-microsecond steps from the operating point, its deepest point read off. The other is the impedance: a test current at a hundred hertz into the closed loop, its voltage divided by the frequency, giving 25.2 microhenries, multiplied by the ramp’s rate of a hundred milliamps a millisecond. They agree to the factor the ringing sets, which the impedance figure measures independently as the height of the hump above the inductance line. Three measurements with no shared step beyond the circuit, and the same eighteen per cent in two of them.

What the march leaves out

The ramp is a straight line with sharp corners. A real load’s current curves into and out of its rise, which removes the high-frequency content at the corners and so lowers the droop of the intermediate ramps a little; the fast and slow limits are unchanged, since they depend only on the whole step and on the rate in the middle.

The pass device and the error amplifier are linear here, as they have been in every essay on this regulator. A large fast step can slew the amplifier, which would deepen the step droop and leave the slow droop untouched, since a slow ramp never asks the amplifier for more than it can supply. That is a second reason the slow regime is the more trustworthy of the two: it is the regime the linear model was built for.

And the standing load is a current source, which leaves the loop at its lightest, the case the ceramic essays used. At an ampere drawn through a resistor the output pole moves up, the crossover with it, and both the inductance and the turnover rise time move; the shape of the argument does not.

The number to keep

A ceramic regulator that droops 103 millivolts against a 100 mA step on its full 10 µF, and 203 on a fifth of it, droops the same against a slow ramp whatever its capacitance: the loop’s own 25.2 µH times the load’s rate of change, times 1.18 on the full capacitor for the hump its lower crossover leaves. The capacitor helps only loads faster than about twenty-three microseconds, and past that the larger capacitor droops more. A 10 mV budget needs the load to take 253 to 298 µs to arrive, on any of the three.

Still open: the second lead, the turn-on, and the load that switches back

A second lead pair in the divider. The hump that costs the full capacitor its eighteen per cent is a shortfall of phase near crossover. A resistor in series with the divider capacitor, or a divider split into two lead pairs, adds phase there; whether it flattens the hump enough to bring the slow-ramp factor to one, and what it costs the step droop, is a comparison on the same three capacitances.

The turn-on, at light load. At turn-on the ceramic sweeps from its full capacitance to a fifth while the output itself is a ramp. A marched turn-on with the capacitance following the voltage would say whether the overshoot at the end of the ramp is the one the slow-ramp law predicts — the inductance times the charging current’s rate — or whether the amplifier’s slew hides it.

A load that switches off as well as on. A pulsed load is a ramp up and a ramp down a fixed time apart. When the time between them is comparable to the hump’s period the two responses add, and a pulse train at the hump’s frequency is the worst case a ramp-rate specification cannot see. Finding the pulse width that maximises the swing on each capacitance would turn this essay’s single edge into the repetitive load most digital circuits actually present.

Part 9 on regulator

One argument about Regulator, and one of 9 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:

What links here

Essays that reach for this one mid-argument — the half of a link its own author cannot write down.

The objects named here

The third axis, after the field and the idea: the things themselves, and every essay that touches each one.

Design tradeoffEquivalent series resistanceLoad regulationLoop gainMeasurement conditionOutput impedancePhase marginTransient responseTrapezoidal rule