The zero the lines put on the wrong side
Assumes: The straight lines, and where they are not the curve · The phase the magnitude already knows
The zero that lifts the lines took apart the argument that makes a phase margin read off the straight lines safe. It has three steps — the loop’s gain never rises above its lines, so the loop crosses unity no higher than they do, and the phase falls with frequency, so a lower crossing has more phase — and a lead section breaks two of them, a zero’s gain lying above its lines and the lead’s phase rising. The two breaks push in opposite directions, and the over-report they allow was small and confined to comfortable loops: 3.12 degrees at most, on a loop of 73.4.
It closed on the case where the two breaks stop cancelling. A zero in the right half-plane has the same magnitude as one on the left, so it breaks the first step in the same way and by the same 3.0103 decibels. Its phase falls rather than rises, so it does not break the third step; it strengthens it. With nothing pulling the other way, the loop crosses higher and has less phase there, and the lines should over-report.
They do, and by much more than three degrees. What the measurement adds is where: the over-report is large only when the zero sits below the plant’s poles, and there it lands on loops with almost no margin at all.
A zero that cannot be seen in a magnitude
A zero at contributes to a loop, where its mirror contributes . On the imaginary axis the two have the same magnitude, , at every frequency, and opposite phases, . The phase the magnitude already knows recovered a minimum-phase network’s phase from its magnitude by Bode’s integral; that recovery is exactly what fails here, because the magnitude is consistent with both phases and the integral returns the mirror’s. The two mirrors that change places found two networks sharing a magnitude and delivering their energy on different schedules. In a feedback loop the same ambiguity is a question of stability.
The loop is built as a netlist and solved, and every figure checks the netlist against the closed form before reading anything. The zero is made the way a circuit would make it: an inverting differentiator gives , and a controlled source adds the input back, giving . The closed loop’s poles are found from the same netlist, so the margin’s sign is held against whether the closed loop actually is stable. Rarely does a zero like this arrive on purpose. It arrives in a boost converter’s control-to-output path, in a common-emitter stage whose feedback capacitor passes signal forward, in any loop with two paths of opposite sign; and in every one of them the magnitude a designer plots looks harmless.
An integrator and a zero: the closed form
The simplest loop with such a zero is an integrator and the zero alone, and it can be solved by hand. Let the lines cross unity at times the zero’s frequency, with below one. Below the zero the lines are the integrator’s slope, so the integrator’s unity-gain frequency is . The loop’s gain is , which reaches one at — always higher than the lines, because the zero lifts the gain above its asymptote there. The loop’s phase is .
So the lines report the phase at their own crossing, , and the loop has the phase at its crossing, which is , or .
The difference is small for small — under a degree below — and it grows without a turning point. At the lines report 48.01 degrees and the loop has 25.84. At they report 45.29 and the loop has 8.11. As the lines’ crossing approaches the zero the loop’s own crossing runs away to infinity, its margin falls to nothing, and the lines go on reporting 45 degrees. A designer who placed the crossing at the zero, on the reasoning that the lines show a comfortable 45 degrees and a flat stretch beyond, has built a loop on the edge of oscillation.
The closed form is a second route to the figure, and it is the stronger one: it says the over-report is not a property of these particular numbers but of the geometry. Above the zero the lines go flat at a gain of , below one, because the zero’s rise cancels the integrator’s fall; the loop’s gain sits above that flat line and does not reach one until of the zero — twice the zero’s frequency at , seven times at 0.99 — where the zero’s phase has gone most of the way to its full ninety degrees.
Why 3.0103 decibels becomes forty-five degrees
The single number every essay on the straight lines has started from is the 3.0103 decibels a real corner sits away from its two asymptotes. The straight lines, and where they are not the curve established it for a pole, and the lead-zero essay found the same three decibels above a zero’s lines. In an all-pole loop that error moved the crossing by a modest factor and the phase there by a few degrees, which is how a gain error became a margin error of a size anyone could live with.
Here the same three decibels move the crossing without limit. The reason is the slope. A pole’s error is felt where the lines are falling at twenty or forty decibels a decade, and a gain error on a steep line is a small frequency error. Above a zero on the right with nothing behind it, the lines are flat: the integrator’s fall and the zero’s rise cancel exactly, and a gain error on a flat line is an unbounded frequency error. Three decibels of lift on a line that sits a fraction of a decibel below unity carries the crossing as far as the lift reaches, and the zero’s lift keeps growing with frequency. That is the same flat stretch the loop that never crosses found making one of a loop’s two margins stop being a number. Here the lines never cross again and the loop does, far above them.
And a frequency error turns into a phase error at the zero’s own rate. The zero’s lag goes from forty-five degrees at its corner toward ninety above it, so every decade the crossing moves past the corner costs the margin most of what remains. The two effects compound: the flat lines move the crossing a long way, and the zero’s phase makes a long way expensive.
Where such zeros come from
A zero on the right is a sign that a signal reaches the output by two paths of opposite sign, and the faster path wins at high frequency. In a common-emitter stage the capacitance from collector to base is one: at low frequency the transistor inverts, and at high frequency the capacitor carries the input straight to the output without inverting it. The frequency a device sets for itself and the node the bandwidth belongs to measured that capacitance as a pole at the input; the same element puts a zero on the right at the transconductance over the capacitance, usually far above the band, where this essay’s figures say it reads short and is harmless.
A boost converter’s control loop is the case that puts it below the poles. Asking for more output means turning the switch on for longer, and for that cycle less current reaches the output; only later does the inductor’s current rise and deliver more. The output first moves the wrong way, and the zero that encodes it falls as the load rises. Every loop of this kind is a candidate for the left-hand side of the figure that divides at the corner.
Where the zero sits decides the sign
Real loops have poles as well, and a pole’s gain lies below its lines, which pulls the crossing the other way. Whether the lines still over-report depends on which of the two is nearer the crossing.
The figure divides at the plant’s corner. A zero below the poles is a zero the loop crosses near — it is the first corner after the integrator — and both of its effects, the lift and the lag, act at the crossing. There the reading is over by tens of degrees, 37.6 behind one pole and 34.4 behind two, and the loops it is over on are the loops where it matters most: 2.1 and 1.5 degrees of real margin. A zero above the poles is past the crossing on any loop with margin to speak of, the poles’ deficit below their lines decides where the loop crosses, and the reading is short, which is the all-pole case and safe.
That is a sharper rule than the lead section’s. The lead’s over-report was a few degrees and lived only on loops with seventy or more; here the over-report is as large as the lines’ own reading and lives on loops that barely work. The one placement to fear is the one this figure isolates: a zero on the right below the plant’s first pole, with the lines crossing near it.
The mirror, exactly
A zero on the right and its mirror on the left can be compared directly, because they share their magnitude at every gain.
The two loops cross unity at the same frequency at every gain, to a part in a billion — the gain has no way to know which side the zero is on — and their margins differ by exactly , which the figure holds at every point to a millionth of a degree. Crossing at 504 hertz, a tenth of the zero, the difference is 11.5 degrees: 69.02 on the left and 57.52 on the right. Crossing at the zero itself it would be ninety.
The mirror is what a designer working from a magnitude alone has in mind, whether or not they know it. Every rule that recovers phase from magnitude — Bode’s integral, the twenty-decibels-a-decade-is-ninety-degrees rule, a sketch drawn from the gain plot — assumes the minimum-phase mirror, because that is the only network a magnitude determines. So the error of reading such a loop from its magnitude is not the lines’ 3.0103 decibels or anything like it. It is the whole of .
The same blindness reaches the bench. A loop measured by injecting a signal and reading only amplitudes — a meter on each side of the injection point, or a spectrum analyser without its phase — returns the magnitude the figure shares between the two loops and nothing that separates them. Only a measurement that keeps the phase can say which side the zero is on, and only a measurement taken out past the zero’s frequency can show its phase doing what a minimum-phase zero’s never does: falling while the gain rises. A designer who has the magnitude and a schematic can usually find the zero in the schematic; one who has only the magnitude has, in the precise sense of the figure, nothing to go on.
Three readings of one loop
Three readings a designer might take from the straight lines can be held against the loop, on a loop that puts the zero where the previous figure says it is dangerous.
Read with the loop’s own phase at the lines’ crossing — the reading the earlier essays called the honest one — the margin is never short anywhere on this loop and is over by up to 26.91 degrees, on a loop with 2.41. Read with the phase off its own straight lines, drawn knowing the zero is on the right, it is over by up to 22.0 degrees and short by no more than 0.36 — less wrong than the first only because the sketch’s phase starts falling a decade early, and still over by twenty degrees on a loop with two. Read with the phase the magnitude implies — the minimum-phase mirror’s — it is over by as much as 115.6 degrees, which is the mirror’s lead counted as margin.
The margin the straight lines report found the all-pole reading always short, and called it a reading that could only err safely. That guarantee was a property of where all the corners were. A loop with a zero on the right below its poles has none of it: the reading errs the dangerous way, by tens of degrees, on exactly the loops whose margin is thin.
What a designer can take from it
Three rules come out of the figures, each with its number.
Cross well below a zero on the right. For an integrator and the zero, the over-report is under a degree while the lines cross below 0.3 of the zero’s frequency, and the margin there is the lines’ to that accuracy. That is a statement about the reading rather than about the design: a margin of seventy degrees needs a crossing near 0.3 of the zero for its own sake, and the two requirements happen to land in the same place.
Know which side of the poles the zero is on. Above the poles the lines read short and the reading is safe, by as much as 22.2 degrees behind two poles. Below them the reading is over and is dangerous. A designer whose zero moves with operating point — a boost converter’s moves with load — can see it cross from one side to the other. The gain margin the lines get exactly wrong found one reading the lines get wrong by a fixed amount; this one has no fixed amount, only a side.
Never read the phase from the magnitude. The minimum-phase phase is the phase of a different circuit, and the difference between the two is twice the zero’s angle. Every tool that infers phase from gain will do this silently.
What the closed form leaves out
The loops are linear and their elements ideal: an integrator with infinite gain at zero frequency, poles that are real and buffered, a zero made with an ideal amplifier. A real loop has more poles above its crossing, which add lag of their own and pull the true margin further down; they make every over-report here a little larger and never smaller, since the lines will not show them either until their own corners. And a phase margin is one number: a loop with a zero on the right also responds to a step by first moving the wrong way, which no margin describes and the straight lines cannot show at all.
The number to keep
A zero on the right has its mirror’s magnitude and straight lines, and the opposite phase. An integrator with such a zero, read off its lines crossing at of the zero, reports on a loop that has : under a degree out below , and 45 degrees reported on a loop with none as reaches one. Behind real poles the reading is over — by up to 37.6 degrees on a loop of 2.1 — only when the zero sits below the poles. Read from the magnitude alone, the error is the whole of .
Still open: the step that starts backwards, the moving zero, and the gain margin
The step that starts backwards. A loop with a zero on the right answers a step by moving the wrong way first, by an amount the zero’s frequency and the crossing set. That undershoot is invisible in a margin and in the lines, and measuring it against the over-report would say whether a designer who reads the lines also misreads the transient.
A zero that moves with the operating point. In a boost converter the zero falls as the load rises. A loop designed at light load with its zero above the poles can find it below them at full load, crossing from the safe side of the figure that divides at the corner to the dangerous one. Following one loop through that crossing would turn the rule above into a load limit.
The gain margin. With a zero on the right the phase reaches −180° sooner, and the gain margin read off the lines is taken at a frequency the lines misplace. Whether that error, too, depends on which side of the poles the zero sits is the companion measurement to this one.
Part 6 on asymptotic approximation
One argument about Asymptotic approximation, and one of 6 essays on it so far, each part numbered by how much of the idea it assumes. What sits either side of it:
The objects named here
The third axis, after the field and the idea: the things themselves, and every essay that touches each one.
Asymptotic approximationBode plotLoop gainMinimum-phasePhase marginRight half-plane zeroStabilityVerification
- Stable, and unstable with less gain loop gain, phase margin, stability
- The floor a second capacitor removes loop gain, phase margin, verification
- The gain the loop closes against loop gain, phase margin, stability
- The level the phase cannot know bode plot, minimum-phase, verification
- The phase a decibel buys bode plot, minimum-phase, phase margin
- The phase a delay never stops adding loop gain, phase margin, stability